50 Gb/s SiGe BiCMOS 4:1 multiplexer and 1:4 demultiplexer for serial communication systems

SiGe BiCMOS 4:1 multiplexer and 1:4 demultiplexer ICs targeting SONET OC-768 applications are packaged to enable bit-error-rate testing by connecting their serial interfaces. Operation is error-free for both circuits at data rates >50 Gb/s and -3.6 V supply.

[1]  E. M. Cherry,et al.  The Design of Wide-Band Transistor Feedback Amplifiers , 1963 .

[2]  Robert G. Swartz.  ULTRA-HIGH SPEED MULTIPLEXER/DEMULTIPLEXER ARCHITECTURES , 1990 .

[3]  M. Oprysko,et al.  Millimeter wave package design: a comparison of simulation and measurement results , 2001, IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565).

[4]  W. Pohlmann.  A silicon-bipolar amplifier for 10 Gbit/s with 45 dB gain , 1994 .

[5]  Hans-Martin Rein,et al.  Design considerations for very-high-speed Si-bipolar IC's operating up to 50 Gb/s , 1996, IEEE J. Solid State Circuits.

[6]  K. Ohhata,et al.  40 Gb/s 4:1 multiplexer and 1:4 demultiplexer IC module using SiGe HBTs , 2001, 2001 IEEE MTT-S International Microwave Sympsoium Digest (Cat. No.01CH37157).

[7]  Y. Baeyens,et al.  A fully-integrated 40 Gb/s clock and data recovery/1:4 DEMUX IC in SiGe technology , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[8]  B. Jagannathan,et al.  A 0.18 /spl mu/m BiCMOS technology featuring 120/100 GHz (f/sub T//f/sub max/) HBT and ASIC-compatible CMOS using copper interconnect , 2001, Proceedings of the 2001 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat. No.01CH37212).