MAPS: Mapping Concurrent Dataflow Applications to Heterogeneous MPSoCs

Processor Systems on Chip (MPSoCs) in order to cope with the increasing applications demands and the tight energy budget of portable devices. The complexity of these systems makes them difficult to program, which has caused academia and industry to look for alternative methodologies and models. In the particular case of multimedia and baseband processing, dataflow models are being proposed and appear to be a sensible choice to represent applications. While high-level models, like dataflow, increase programmers' productivity, new, powerful tools are badly required that lower the abstract specification into an efficient implementation. In this paper, a framework is presented that provides support for mapping multiple dataflow applications onto heterogeneous MPSoCs. The framework is aware of design constraints, provides different means for performance estimation and supports a variety of mapping heuristics. The tool is showcased on three applications on a virtual platform containing heterogeneous processing elements. The heuristics for single applications reported a speedup of up to 40% when compared against random walk. The multi-application component helped to find an appropriate scheduling configuration that met real-time constraints when the three applications were running simultaneously.