A Neuro-Inspired Spike Pattern Classifier

The emergence of post-silicon nano-devices and the coming trillion-sensor era driven by the Internet of Things have led to a search for alternative computational paradigms that can efficiently derive useful information from abundant data while enable efficient hardware implementations under significant device variations. Such computational paradigms may emerge as we explore the information processing in biological sensory systems, which achieve unparalleled performance and energy efficiency with mediocre and unreliable components. This paper presents a neuro-inspired spike pattern classifier for an artificial olfactory system, where an analog feature extraction gas sensing front end first converts sensor array information into spike patterns. The spike pattern classifier consists of a transformation of the input spikes into high-dimensional sparse vectors and a cortical memory model. The transformation is based on a random sampling scheme that can be efficiently performed with circuits exhibiting large parametric variations. An associative memory is used to perform fast and efficient storage and retrieval of the sparse vectors. The classifier achieves an output retrieval fidelity of 0.97 with a Fano factor ( $\sigma /\mu $ ) of 0.0143 when it is implemented with delay cells having a delay Fano factor of 1.6759. This is 117 times of reduction in parametric spread. It is also robust against operation failures: the output fidelity is still greater than 0.8 even when the probability of operation failure reaches 0.45.

[1]  Carlos D. Brody,et al.  Computing with Action Potentials , 1997, NIPS.

[2]  Ping-Chen Huang,et al.  Bio-Inspired Artificial Olfactory System , 2015 .

[3]  Jan M. Rabaey,et al.  A Bio-Inspired Analog Gas Sensing Front End , 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

[4]  L. Buck,et al.  Information coding in the vertebrate olfactory system. , 1996, Annual review of neuroscience.

[5]  J J Hopfield,et al.  What is a moment? "Cortical" sensory integration over a brief interval. , 2000, Proceedings of the National Academy of Sciences of the United States of America.

[6]  Subhasish Mitra,et al.  Monolithic three-dimensional integration of carbon nanotube FETs with silicon CMOS , 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

[7]  Carlos D. Brody,et al.  Simple Networks for Spike-Timing-Based Computation, with Application to Olfactory Processing , 2003, Neuron.

[8]  Jan M. Rabaey,et al.  Hyperdimensional computing with 3D VRRAM in-memory kernels: Device-architecture co-design for energy-efficient, error-resilient language recognition , 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

[9]  Teuvo Kohonen,et al.  Correlation Matrix Memories , 1972, IEEE Transactions on Computers.

[10]  Tony F. Wu,et al.  Monolithic 3D integration of logic and memory: Carbon nanotube FETs, resistive RAM, and silicon FETs , 2014, 2014 IEEE International Electron Devices Meeting.

[11]  Hai Wei,et al.  Monolithic three-dimensional integration of carbon nanotube FET complementary logic circuits , 2013, 2013 IEEE International Electron Devices Meeting.

[12]  J J Hopfield,et al.  What is a moment? Transient synchrony as a collective mechanism for spatiotemporal integration. , 2001, Proceedings of the National Academy of Sciences of the United States of America.

[13]  Linda B Buck,et al.  Unraveling the sense of smell (Nobel lecture). , 2005, Angewandte Chemie.

[14]  Naresh R. Shanbhag,et al.  Toward achieving energy efficiency in presence of deep submicron noise , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[15]  Pentti Kanerva,et al.  Sparse Distributed Memory , 1988 .

[16]  Louis A. Jaeckel An alternative design for a sparse distributed memory , 1989 .

[17]  Pentti Kanerva,et al.  Hyperdimensional Computing: An Introduction to Computing in Distributed Representation with High-Dimensional Random Vectors , 2009, Cognitive Computation.

[18]  Poras T. Balsara,et al.  A wide-range, high-resolution, compact, CMOS time to digital converter , 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

[19]  Rahul Sarpeshkar,et al.  Analog Versus Digital: Extrapolating from Electronics to Neurobiology , 1998, Neural Computation.

[20]  Arindam Basu,et al.  Low-Power, Adaptive Neuromorphic Systems: Recent Progress and Future Directions , 2018, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

[21]  John Lazzaro Low-power silicon spiking neurons and axons , 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

[22]  E.J. Candes Compressive Sampling , 2022 .

[23]  Jan M. Rabaey,et al.  Brain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case study , 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).