Improvement of damping impedance method for Power Hardware in the Loop simulations

The aim of this study is to present an improvement of the Damping Impedance Method (DIM) Interface Algorithm for Power Hardware in the Loop (PHIL) simulations. The improvement is based on the calculation of the Hardware Under Test (HUT) impedance, in order to include it as part of the Damping Impedance Method to enhance its accuracy and stability. To verify the results, the improved DIM interface is simulated using MATLAB/Simulink, furthermore, a laboratory implementation of a PHIL simulation is carried out using a variable load. The stability of the interface algorithm is graphically observed using the Nyquist and Bode stability criteria, whereas the precision is validated through simulations that compare the Mean Square Error (MSE), as well as laboratory experiments.

[1]  O. Wasynczuk,et al.  A model-in-the-loop interface to emulate source dynamics in a zonal DC distribution system , 2005, IEEE Transactions on Power Electronics.

[2]  Katsuhiko Ogata,et al.  Ingeniería de control moderna , 1980 .

[3]  O. Anaya-Lara,et al.  Real-time simulator for power quality disturbance applications , 2000, Ninth International Conference on Harmonics and Quality of Power. Proceedings (Cat. No.00EX441).

[4]  F. Ponci,et al.  Design and implementation of a power-hardware-in-the-loop interface: a nonlinear load case study , 2005, Twentieth Annual IEEE Applied Power Electronics Conference and Exposition, 2005. APEC 2005..

[5]  M. Steurer,et al.  An effective method for evaluating the accuracy of Power Hardware-in-the-Loop simulations , 2008, 2008 IEEE/IAS Industrial and Commercial Power Systems Technical Conference.

[6]  Bernhard Klaassen,et al.  An improved relaxation approach for mixed system analysis with several simulation tools , 1995, Proceedings of EURO-DAC. European Design Automation Conference.

[7]  Wei Ren,et al.  Accuracy Evalaution of Power Hardware-in-the-Loop (PHIL) Simulation , 2007 .

[8]  Vladimir B. Dmitriev-Zdorov.  Generalized coupling as a way to improve the convergence in relaxation-based solvers , 1996, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition.

[9]  Alexander Viehweider,et al.  Stabilization of Power Hardware-in-the-Loop simulations of electric energy systems , 2011, Simul. Model. Pract. Theory.

[10]  Il Do Yoo.  A study on the improvement of simulation accuracy in power hardware in the loop simulation , 2013 .

[11]  M. Steurer,et al.  An Effective Method for Evaluating the Accuracy of Power Hardware-in-the-Loop Simulations , 2008, IEEE Transactions on Industry Applications.

[12]  Christian Dufour,et al.  A Method to Stabilize a Power Hardware-inthe-loop Simulation of Inductor Coupled Systems , 2009 .

[13]  P. Holmberg,et al.  Expanding an Analogue HVDC Simulator's Modelling Capability Using a Real-Time Digital Simulator (RTDS) , 1995, ICDS '95. First International Conference on Digital Power System Simulators.

[14]  Arindam Ghosh,et al.  Stability synthesis of power hardware-in-the-loop (PHIL) simulation , 2014, 2014 IEEE PES General Meeting | Conference & Exposition.

[15]  A. Monti,et al.  A novel interface for power-hardware-in-the-loop simulation , 2004, 2004 IEEE Workshop on Computers in Power Electronics, 2004. Proceedings..

[16]  A.L. Sangiovanni-Vincentelli,et al.  Relaxation-Based Electrical Simulation , 1983, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[17]  David J. Atkinson,et al.  Real-time emulation for power equipment development. Part 2: The virtual machine , 1998 .

[18]  Alberto Sangiovanni-Vincentelli,et al.  Partitioning Algorithms And Parallel Implementations Of Waveform Relaxation Algorithms For Circuit S , 1985 .

[19]  G. Ledwich,et al.  Power Network in Loop: A Paradigm for Real-Time Simulation and Hardware Testing , 2010, IEEE Transactions on Power Delivery.

[20]  M. Steurer,et al.  Controller and Power Hardware-In-Loop Methods for Accelerating Renewable Energy Integration , 2007, 2007 IEEE Power Engineering Society General Meeting.

[21]  R. Fischl,et al.  Evaluation of the static performance of a simulation-stimulation interface for power hardware in the loop , 2003, 2003 IEEE Bologna Power Tech Conference Proceedings,.

[22]  M. Steurer,et al.  Improve the Stability and the Accuracy of Power Hardware-in-the-Loop Simulation by Selecting Appropriate Interface Algorithms , 2008, IEEE Transactions on Industry Applications.