Low power filtering using approximate processing for DSP applications

The growing demand for portable multimedia devices has placed increased importance on low power solutions for DSP tasks such as filtering and source coding. An approach to power reduction in digital CMOS filter design using approximate processing is presented. This involves adaptively reducing the number of operations switched per sample based on signal statistics. Speech filtering examples demonstrate that power consumption can be reduced over conventional solutions by an order of magnitude for wireless applications.

[1]  Anantha P. Chandrakasan,et al.  Design of portable systems , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[2]  S. Hamid Nawab,et al.  A framework for quality versus efficiency tradeoffs in STFT analysis , 1995, IEEE Trans. Signal Process..

[3]  Marios C. Papaefthymiou,et al.  Precomputation-based sequential logic optimization for low power , 1994, IEEE Trans. Very Large Scale Integr. Syst..

[4]  Earl E. Swartzlander,et al.  Optimizing Arithmetic Elements For Signal Processing , 1992, Workshop on VLSI Signal Processing.

[5]  B.M. Gordon,et al.  A low power subband video decoder architecture , 1994, Proceedings of ICASSP '94. IEEE International Conference on Acoustics, Speech and Signal Processing.

[6]  Anantha P. Chandrakasan,et al.  Low-power CMOS digital design , 1992 .

[7]  Anantha P. Chandrakasan,et al.  Low Power Digital CMOS Design , 1995 .

[8]  Edmund H. Durfee,et al.  Approximate Processing in Real-Time Problem Solving , 1988, AI Mag..