NetFPGA SUME: Toward 100 Gbps as Research Commodity

The demand-led growth of datacenter networks has meant that many constituent technologies are beyond the research community's budget. NetFPGA SUME is an FPGA-based PCI Express board with I/O capabilities for 100 Gbps operation as a network interface card, multiport switch, firewall, or test and measurement environment. NetFPGA SUME provides an accessible development environment that both reuses existing codebases and enables new designs.

[1]  Hakim Weatherspoon,et al.  SoNIC: Precise Realtime Software Access and Control of Wired Networks , 2013, NSDI.

[2]  Derek McAuley,et al.  Fairisle: an ATM network for the local area , 1991, SIGCOMM 1991.

[3]  Philippe Owezarski,et al.  OSNT: open source network tester , 2014, IEEE Network.

[4]  Philip Watts,et al.  Efficient photonic coding: a considered revision , 2011, GreenNets '11.

[5]  Glen Gibb,et al.  NetFPGA--An Open Platform for Gigabit-Rate Network Switching and Routing , 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).

[6]  Charles P. Thacker.  Improving the future by examining the past: ACM Turing Award Lecture , 2007 .

[7]  Peter G. Neumann,et al.  The CHERI capability model: Revisiting RISC in an age of risk , 2014, 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA).

[8]  Michaela Blott.  Fpga Research Design Platform Fuels Network Advances Fpga Research Design Platform Fuels Network Advances , .

[9]  Keir Fraser,et al.  Arsenic: a user-accessible gigabit Ethernet interface , 2001, Proceedings IEEE INFOCOM 2001. Conference on Computer Communications. Twentieth Annual Joint Conference of the IEEE Computer and Communications Society (Cat. No.01CH37213).

[10]  Nick McKeown,et al.  OpenFlow: enabling innovation in campus networks , 2008, CCRV.

[11]  Amin Vahdat,et al.  SENIC: Scalable NIC for End-Host Rate Limiting , 2014, NSDI.

[12]  Charles P. Thacker,et al.  Improving the Future by Examining the Past , 2007 .

[13]  Antony Rowstron,et al.  Symbiotic routing in future data centers , 2010, SIGCOMM 2010.

[14]  Christoforos E. Kozyrakis,et al.  RAMP: Research Accelerator for Multiple Processors , 2007, IEEE Micro.