Toward large-scale access-transistor-free memristive crossbars

Memristive crossbars have been shown to be excellent candidates for building an ultra-dense memory system because a per-cell access-transistor may no longer be necessary. However, the elimination of the access-transistor introduces several parasitic effects due to the existence of partially-selected devices during memory accesses, which could limit the scalability of access-transistor-free (ATF) memristive crossbars. In this paper we discuss these challenges in detail and describe some solutions addressing these challenges at multiple levels of design abstraction.

[1]  Dewei Chu,et al.  High-performance nanocomposite based memristor with controlled quantum dots as charge traps. , 2013, ACS applied materials & interfaces.

[2]  Wei Lu,et al.  A Low-Power Variation-Aware Adaptive Write Scheme for Access-Transistor-Free Memristive Memory , 2015, ACM J. Emerg. Technol. Comput. Syst..

[3]  Ligang Gao,et al.  High precision tuning of state for memristive devices by adaptable variation-tolerant algorithm , 2011, Nanotechnology.

[4]  Leon O. Chua Resistance switching memories are memristors , 2011 .

[5]  Wei Wang,et al.  Design considerations for variation tolerant multilevel CMOS/Nano memristor memory , 2010, GLSVLSI '10.

[6]  J Joshua Yang,et al.  Memristive devices for computing. , 2013, Nature nanotechnology.

[7]  Yuchao Yang,et al.  Complementary resistive switching in tantalum oxide-based resistive memory devices , 2012, 1204.3515.

[8]  Ferdinando Bedeschi,et al.  A Multi-Level-Cell Bipolar-Selected Phase-Change Memory , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[9]  裕幸 飯田,et al.  International Technology Roadmap for Semiconductors 2003の要求清浄度について - シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について - , 2004 .

[10]  J. Yang,et al.  Memristive switching mechanism for metal/oxide/metal nanodevices. , 2008, Nature nanotechnology.

[11]  S. Watts,et al.  Latest Advances and Roadmap for In-Plane and Perpendicular STT-RAM , 2011, 2011 3rd IEEE International Memory Workshop (IMW).

[12]  R. Waser,et al.  Nanoionics-based resistive switching memories. , 2007, Nature materials.

[13]  Narayan Srinivasa,et al.  A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. , 2012, Nano letters.

[14]  R. Williams,et al.  Measuring the switching dynamics and energy efficiency of tantalum oxide memristors , 2011, Nanotechnology.

[15]  Cong Xu,et al.  Design trade-offs for high density cross-point resistive memory , 2012, ISLPED '12.

[16]  Mei Liu,et al.  Three-dimensional CMOL: three-dimensional integration of CMOS/nanomaterial hybrid digital circuits , 2007 .

[17]  Amirali Ghofrani,et al.  Towards data reliable crossbar-based memristive memories , 2013, 2013 IEEE International Test Conference (ITC).

[18]  Peng Lin,et al.  Cross point arrays of 8 nm × 8 nm memristive devices fabricated with nanoimprint lithography , 2013 .

[19]  Khaled N. Salama,et al.  Memristor-based memory: The sneak paths problem and solutions , 2013, Microelectron. J..

[20]  R. Waser,et al.  A Novel Reference Scheme for Reading Passive Resistive Crossbar Memories , 2006, IEEE Transactions on Nanotechnology.

[21]  Dmitri B. Strukov,et al.  3D CMOS-memristor hybrid circuits: devices, integration, architecture, and applications , 2012, ISPD '12.

[22]  Amirali Ghofrani,et al.  HReRAM: A hybrid reconfigurable resistive random-access memory , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[23]  Byung Joon Choi,et al.  Engineering nonlinearity into memristors for passive crossbar applications , 2012 .

[24]  Yukio Hayakawa,et al.  An 8 Mb Multi-Layered Cross-Point ReRAM Macro With 443 MB/s Write Throughput , 2012, IEEE Journal of Solid-State Circuits.

[25]  D. Strukov,et al.  CMOL: Devices, Circuits, and Architectures , 2006 .

[26]  C. Hu,et al.  9nm half-pitch functional resistive memory cell with <1µA programming current using thermally oxidized sub-stoichiometric WOx film , 2010, 2010 International Electron Devices Meeting.

[27]  Warren Robinett,et al.  On the integration of memristors with CMOS using nanoimprint lithography , 2009, Advanced Lithography.

[28]  Rainer Waser,et al.  Complementary resistive switches for passive nanocrossbar memories. , 2010, Nature materials.

[29]  Tim Kwang-Ting Cheng,et al.  Architecting Low Power Crossbar-Based Memristive RAM , 2013 .

[30]  Jiantao Zhou,et al.  Stochastic Memristive Devices for Computing and Neuromorphic Applications , 2013, Nanoscale.

[31]  Luca Benini,et al.  Energy-efficient GPGPU architectures via collaborative compilation and memristive memory-based computing , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).