MIM HfO/sub 2/ low leakage capacitors for eDRAM integration at interconnect levels

An innovative 6 nm HfO/sub 2/ MIM capacitor was integrated in interconnect levels for eDRAM functions. HfO/sub 2/ layers or Al/sub 2/O/sub 3/-HfO/sub 2/ stacks were deposited by ALCVD/sup /spl reg//. Using damascene process with TiN electrodes, this method is fully compatible with copper interconnects technology. No high temperature annealing is required to obtain dielectric performances satisfying eDRAM needs: 30 fF per cell, low leakages and high reliability.

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