(Invited) An Overview of Patterned Metal/Dielectric Surface Bonding: Mechanism, Alignment and Characterization

Bonding is one of the key stages for 3D integration with thinning and trough silicon via. It has to respect some global constraints for these devices. For example, a low temperature process is required when the bonding is done after or during the back end of line process. When localized vertical conductive interconnections are needed, an accurate (+/1 μm) alignment during bonding is required. The bonding toughness has to be strong enough to enable post processes like thinning. The choice of the metal is also of importance and has to be in accordance with the technology of the wafers (or dice) to be bonded. Finally the bonding technology should impact as little as possible on the technology yield and cost. Since the past ten years extensive research have been done to develop a hybrid bonding that allow localized vertical conductive interconnections. This type of bonding is also of interest for devices where, light reflective plane, heat dissipation, buried conductive layers or sealing are needed such as MEMs, power devices or LEDs. Several techniques are implemented depending if it addresses a wafer to wafer or die to wafer stack. Techniques such as thermo compression with or without polymers between metal pads, with or without eutectic alloys to decrease temperature or more recently with Thiol protected surfaces[1], bumps with low temperature solders or direct bonding are the main hybridising techniques. We will review the latest developments obtained on each technique by the principal actors of the domain. Process temperature, alignment, pitch and various pro and cons will be discussed. Nevertheless, the diminution of the bonding pitch will be a limitation difficult to overcome for conventional solder joints or thermo-compression mainly because the use of an under-filling will be very difficult. For direct bonding since the whole surface is bonded at the same time this is not a problem. Several ways were investigated to realize the direct bonding of heterogeneous metal surfaces: room temperature bonding in an ultra high vacuum tool [2]. The preferred metal is copper since it is the metal for BEOL damascene processes. We have demonstrated at LETI the feasibility of a direct hydrophilic copper-copper bonding at room temperature, atmospheric pressure and ambient air without applying an external stress. The surfaces are prepared by a chemical mechanical polishing step [3, 4]. This very simple preparation allows to use standard wafer to wafer aligner equipment to obtain an alignment in the +/-1μm range. It was also implemented for die to wafer bonding [5]. TEM observations lead us to propose a bonding mechanism based on a direct bonding coupled to a diffusion bonding (fig. 1, fig. 2). X-Ray Reflectivity (XRR) analysis enables a fine resolution of Cu/Cu bonding interface electronic density, fig. 3. For post bonding anneal around 200°C, the increase of electronic density at the bonding interface indicates its sealing. This sealing will be discussed with respect to the patterned wafer parameters in addition to acoustic and infra red microscopy observations. Nevertheless the characterization method of choice is the electrical behavior of bonded daisy chains. Daisy chains with 30 000 connections with 3x3 μm contact areas were operational all over a substrate for both 200 °C and 400°C bonding annealing (fig. 4). Considering a chip size of 2 mm2, the density of interconnections is estimated around d=1,5 10/cm2. A perfect ohmic behaviour is observed for all the tested structures. A specific contact resistance around 22.5mΩ. m was extracted [6].