Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding

As technology scales toward deep submicron, on-chip communication on global interconnects is becoming increasingly slow and power-hungry with respect to computation. Therefore, low-swing signaling is viewed as a natural choice for future on-chip communication fabrics. Unfortunately, as signal swings are reduced, the effect of noise sources such as power supply noise, crosstalk and radiation induced effects, becomes more significant. This paper investigates how to deal with noise sources in an energy-aware fashion when designing on-chip low-swing signaling schemes. The basic idea is to exploit redundant coding to maintain high communication reliability even in a low signal-to-noise ratio regime. We compare several error correcting codes and error detecting codes with retransmission, spanning the tradeoff between coding, decoding and retransmission performance, energy and reliability. The analysis is performed in a realistic system-on-chip setting, focusing on an AMBA bus interface.

[1]  Dake Liu,et al.  Power consumption estimation in CMOS VLSI chips , 1994, IEEE J. Solid State Circuits.

[2]  C. Svensson Optimum voltage swing on on-chip and off-chip interconnects , 2000, Proceedings of the 26th European Solid-State Circuits Conference.

[3]  Cecilia Metra,et al.  Optimization of error detecting codes for the detection of crosstalk originated errors , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

[4]  Michele Zorzi Some results on error control for burst-error channels under delay constraints , 2001, IEEE Trans. Veh. Technol..

[5]  S. Williams,et al.  Architectures for fast encoding and error detection of cyclic codes , 1992 .

[6]  George Varghese,et al.  Low-swing on-chip signaling techniques: effectiveness and robustness , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[7]  Luca Benini,et al.  Low power error resilient encoding for on-chip data buses , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[8]  K. L. Shepard,et al.  Noise in deep submicron digital design , 1996, ICCAD 1996.

[9]  W. Dally Interconnect-limited VLSI architecture , 1999, Proceedings of the IEEE 1999 International Interconnect Technology Conference (Cat. No.99EX247).