SMCFA: A Zynq-based stacked multi CPU-FPGA architecture

With an emerging market of ARM embedded processors and rapidly updating techniques used in manufacture process of FPGA, the structure of CPU combining with FPGA is increasingly attracting attention, such as the Zynq SoC heterogeneous computing platform developed by Xilinx which integrates a dual-core Cortex-A9 ARM processor and a FPGA in one chip. In this paper, we propose an 4-node Zynq based stacked multi CPU-FPGA architecture SMCFA. The dual-core ARM processors act as transaction process handler, and the FPGA implements the function of hardware acceleration. Four Zynq boards connected into stacked multi CPU-FPGA architecture by an external bus, which is specifically designed for this structural called SEU-mBUS. For experiment, we utilize SMCFA to accelerate satellite image retrieval. The Accelerator IP core is 9.2× faster than i5-3470 CPU when handling images, and using SMCFA can achieve a 5.3× speedup on the entire satellite image retrieval system.