The application of 2/sup N/ trees to device model approximation is described. The domain of the device model function is partitioned using a 2/sup N/ tree, with smaller partitions where the function is more nonlinear. The function value associated with each corner of each partition is precomputed, and the function is evaluated by a given point by interpolation over the smallest partition that includes that point. This technique has the advantage that highly nonlinear functions can be modeled with modest space and time requirements. Exponential functions, such as the subthreshold behavior of FETs, can be accurately modeled. Accuracy levels of 1% are possible down to currents of 10/sup -11/ A. Table generation time is small; it is only a few minutes for a MOSFET model including subthreshold effects. This algorithm is especially suited for application to a hardware-accelerated device model evaluator. The design of a prototype that is capable of performing a device model evaluation of a SPICE level-2 model including subthreshold effects in 1 mu s is described. Less detailed models, such as timing simulator models, can be evaluated in as little as 0.2 mu s. >
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