Heterogeneous and Inexact: Maximizing Power Efficiency of Edge Computing Sensors for Health Monitoring Applications

In the Internet-of-Things (IoT) era, there is an increasing trend to enable intelligent behavior in edge computing sensors. Thus, a new generation of smart wearable devices for health monitoring is being developed, able to perform complex Digital Signal Processing (DSP) routines that extract features of clinical relevance from the acquired data. These new edge computing sensors for personalized healthcare must operate within a tight energy envelope; addressing the ensuing challenge, we herein introduce an inexact and heterogeneous edge computing architecture, specifically tailored to the bio-DSP domain. We observe that bio-signal analysis applications present task-level parallelism, intensive computational hotspots and a high degree of resilience towards errors. These characteristics drive our new bio-DSP edge node architecture design composed of multiple processing cores, a Coarse-Grained Reconfigurable Array (CGRA) accelerator, and hardware-software co-design support to become resilient to a non-zero probability of bit-flips at runtime. All these characteristics enable our new bio-DSP architecture to operate with an ultra-low voltage operating point. Indeed our results indicate that the energy benefits attained from the inclusion of all these characteristics in bio-DSP architectures are more than additive: task parallelism is harnessed both at the processor and the accelerator level, and the high tolerance of the CGRA towards voltage down-scaling is exploited to further decrease the IoT edge bio-DSP system energy envelope.

[1]  Pierre Vandergheynst,et al.  Compressed Sensing for Real-Time Energy-Efficient ECG Compression on Wireless Body Sensor Nodes , 2011, IEEE Transactions on Biomedical Engineering.

[2]  Kunjan Patel,et al.  SYSCORE: A Coarse Grained Reconfigurable Array Architecture for Low Energy Biosignal Processing , 2011, 2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines.

[3]  David Atienza,et al.  An Inexact Ultra-low Power Bio-signal Processing Architecture With Lightweight Error Recovery , 2017, ACM Trans. Embed. Comput. Syst..

[4]  Fadi J. Kurdahi,et al.  Design and Implementation of the MorphoSys Reconfigurable Computing Processor , 2000, J. VLSI Signal Process..

[5]  Shankar Muthu Krishnan,et al.  ECG signal conditioning by morphological filtering , 2002, Comput. Biol. Medicine.

[6]  Arnon D. Cohen,et al.  The weighted diagnostic distortion (WDD) measure for ECG signal compression , 2000, IEEE Transactions on Biomedical Engineering.

[7]  David Atienza,et al.  Synchronizing code execution on ultra-low-power embedded multi-channel signal analysis platforms , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[8]  Luca Benini,et al.  Approximate Compressed Sensing: Ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor , 2014, 2014 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

[9]  David A. Patterson,et al.  Computer Architecture: A Quantitative Approach , 1969 .

[10]  Hiroshi Nakamura,et al.  Cool Mega-Arrays: Ultralow-Power Reconfigurable Accelerator Chips , 2011, IEEE Micro.

[11]  David Atienza,et al.  HEAL-WEAR: An Ultra-Low Power Heterogeneous System for Bio-Signal Analysis , 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

[12]  Sparsh Mittal,et al.  A Survey of Techniques for Approximate Computing , 2016, ACM Comput. Surv..

[13]  Luca Benini,et al.  A Synchronization-Based Hybrid-Memory Multi-Core Architecture for Energy-Efficient Biomedical Signal Processing , 2017, IEEE Transactions on Computers.

[14]  David Atienza,et al.  Hardware/software approach for code synchronization in low-power multi-core sensor nodes , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[15]  Josep Torrellas,et al.  VARIUS-NTV: A microarchitectural model to capture the increased sensitivity of manycores to process variations at near-threshold voltages , 2012, IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2012).

[16]  Yifan He,et al.  Xetal-Pro: An ultra-low energy and high throughput SIMD processor , 2010, Design Automation Conference.