Fully-Integrated Non-Magnetic 180nm SOI Circulator with > 1W P1dB, >+50dBm IIP3 and High Isolation Across 1.85 VSWR
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[1] Masoud Koochakzadeh,et al. Miniaturized Transmission Lines Based on Hybrid Lattice-Ladder Topology , 2010, IEEE Transactions on Microwave Theory and Techniques.
[2] Hooman Darabi,et al. Low-Loss Integrated Passive CMOS Electrical Balance Duplexers With Single-Ended LNA , 2016, IEEE Transactions on Microwave Theory and Techniques.
[3] Harish Krishnaswamy,et al. A Millimeter-Wave Non-Magnetic Passive SOI CMOS Circulator Based on Spatio-Temporal Conductivity Modulation , 2017, IEEE Journal of Solid-State Circuits.
[4] Jan Craninckx,et al. 2.2 A +70dBm IIP3 single-ended electrical-balance duplexer in 0.18um SOI CMOS , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.
[5] Harish Krishnaswamy,et al. A CMOS Passive LPTV Nonmagnetic Circulator and Its Application in a Full-Duplex Receiver , 2017, IEEE Journal of Solid-State Circuits.