Reverse Compilation for Speculative Parallel Threading

Multi-core processors can easily provide benefits for multithreaded workloads, but many applications written for uniprocessors cannot automatically benefit from chip multiprocessors (CMP) designs. This paper presents a reverse compilation framework, which translates existing binary code without source code to the static single assignment (SSA) form, and then the internal SSA form is applied by the compilation phase to generate the speculative parallel threading (SPT) code. A profiler is applied to optimize the code dynamically during execution. The evaluation results show that these existing binary codes without source codes execute on CMP with performance improved, due to taking advantage of the speculative parallel threading support provided by the processor

[1]  Pingzhi Fan,et al.  Proceedings of the 5th international conference on Parallel and Distributed Computing: applications and Technologies , 2004 .

[2]  Takashi Matsumoto,et al.  Speculative execution model with duplication , 1998, ICS '98.

[3]  Chen Yang,et al.  A cost-driven compilation framework for speculative parallelization of sequential programs , 2004, PLDI '04.

[4]  Xiao-Feng Li,et al.  Software Value Prediction for Speculative Parallel Threaded Computations , 2003 .

[5]  Avi Mendelson,et al.  Can program profiling support value prediction? , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.

[6]  Wei Liu,et al.  POSH: a TLS compiler that exploits program structure , 2006, PPoPP '06.

[7]  David F. Bacon,et al.  Compiler transformations for high-performance computing , 1994, CSUR.

[8]  Kunle Olukotun,et al.  Exposing speculative thread parallelism in SPEC2000 , 2005, PPoPP.

[9]  Mike Van,et al.  UQBT: Adaptable Binary Translation at Low Cost , 2000 .

[10]  Manoj Franklin,et al.  A general compiler framework for speculative multithreading , 2002, SPAA '02.

[11]  Takashi Yokota,et al.  Preliminary evaluation of a binary translation system for multithreaded processors , 2002, International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems.

[12]  Kunle Olukotun,et al.  Using thread-level speculation to simplify manual parallelization , 2003, PPoPP '03.

[13]  Cristina Cifuentes,et al.  Reverse compilation techniques , 1994 .

[14]  Mark N. Wegman,et al.  Efficiently computing static single assignment form and the control dependence graph , 1991, TOPL.