The design of an asynchronous blocksorter

This paper has presented some engineering work on developing a micropipeline blocksorter. The work presented in this paper demonstrates that VHDL can be used to describe the behaviour of micropipelined systems. It also shows a comparison of 2-phase and 4-phase implementations in transistor count, speed, and energy. Though the nature of the work is mainly engineering, there are some significant new insights gained in the course of the work.

[1]  C. A. R. Hoare,et al.  Communicating sequential processes , 1978, CACM.

[2]  Tam-Anh Chu,et al.  Synthesis of self-timed VLSI circuits from graph-theoretic specifications , 1987 .

[3]  Mark B. Josephs,et al.  Delay-Insensitive Circuits: An Algebraic Approach to their Design , 1990, CONCUR.

[4]  Jianwei Liu,et al.  Dynamic logic in four-phase micropipelines , 1996, Proceedings Second International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[5]  Inmos Limited,et al.  Occam Programming Manual , 1984 .

[6]  Stephen B. Furber,et al.  The design of an asynchronous VHDL synthesizer , 1998, Proceedings Design, Automation and Test in Europe.

[7]  Mathew A. Sacker,et al.  A behavioral synthesis system for asynchronous circuits , 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[8]  Jim D. Garside,et al.  A micropipelined ARM , 1993, VLSI.

[9]  Kees van Berkel,et al.  Handshake Circuits: An Asynchronous Architecture for VLSI Programming , 1993 .

[10]  James L. Peterson,et al.  Petri Nets , 1977, CSUR.

[11]  Jim D. Garside,et al.  AMULET2e: an asynchronous embedded controller , 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[12]  Paul Day,et al.  Four-phase micropipeline latch control circuits , 1996, IEEE Trans. Very Large Scale Integr. Syst..