MARBLE: an asynchronous on-chip macrocell bus

Abstract This paper presents MARBLE, the Manchester Asynchronous Bus for Low Energy, a two channel asynchronous micropipeline-style VLSI macrocell bus. In addition to basic bus functions, MARBLE supports bus-bridging and test access, demonstrating that all the functions of a high speed macrocell bus can be implemented efficiently in a practical, fully asynchronous design style. MARBLE is used in the AMULET3i asynchronous Microprocessor system to connect the CPU core and DMA controller to RAM, ROM and peripherals. It exploits pipelining of the arbitration, address and data-cycles with a protocol based on split-transfers to meet the performance needs of such a system.