Some Remarks on the Use of Time-Varying Delay to Model Sample-and-Hold Circuits

This note revises the so-called input delay approach to the control of sampled-data systems with nonuniform sampling, in which the sample-and-hold circuit is embedded into an analog system with a time- varying input delay. It is shown that the conservatism in calculating the maximal admissible sampling period is reduced by about 57% if the time- varying delay embedding step is omitted.

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