New buses and links for data acquisition

Abstract Bus standards for data acquisition have been vital for the construction and operation of medium and large HEP experiments. The recent industry bus standardisation effort will soon release the next generation of high performance buses and links for scalable systems. Prototype components, VLSI chips and board-level systems are already announced. Layers of the new bus specifications cover wide areas of applications and provide possibilities to define specific bus profiles by interest groups. New, innovative solutions which are needed for high rate experiments are becoming visible. These will provide novel architectural possibilities, very high bandwidth, fast silicon, industry support and new metric mechanical standards. Interconnected via standard bridges, different bus standards can be used to cover the varying requirements from the front ends to the computers.