论文信息 - 120nm CMOS OPAMP with 690 MHz f/sub T/ and 128 dB DC gain

120nm CMOS OPAMP with 690 MHz f/sub T/ and 128 dB DC gain

In this paper, an advancement to compensate multistage operational amplifiers is presented. High-gain and highspeed operational amplifiers can be realized with this approach. One example of such a high-gain amplifier with a unity-gain frequency of 693 MHz and DC gain of 128.8dB is presented. The high-speed settling is mainly reached by dominant Miller compensation via 4 stages.

H. Zimmermann | F. Schlogl

[1] Sudhanshu Shekhar Jamuar,et al. Low voltage analog circuit design techniques , 2002 .

[2] Robert G. Meyer,et al. Relationship between frequency response and settling time of operational amplifiers , 1974 .

[3] Ezz I. El-Masry,et al. A fast settling CMOS operational amplifier , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[4] Johan H. Huijsing,et al. Operational Amplifiers - Theory and Design , 2000 .

[5] Paul R. Gray,et al. A fast-settling monolithic feedforward op-amp using doublet compression techniques , 1973 .

[6] Gaetano Palumbo,et al. Design methodology and advances in nested-Miller compensation , 2002 .

[7] Christofer Toumazou,et al. High-speed current mirror resistive compensation technique , 1995 .

[8] Franz Schlögl,et al. High-gain high-speed operational amplifier in digital 120nm CMOS , 2004, IEEE International SOC Conference, 2004. Proceedings..

[9] Carlos Galup-Montoro,et al. Series-parallel association of FET's for high gain and high frequency applications , 1994, IEEE J. Solid State Circuits.