A VLSI interconnect structure for neural networks

The Connectionist or Neural Network (CNN) computation model has constraints that limit the suitability of VLSI interconnect architectures for supporting efficient emulation. This paper presents a set of metrics that can be used for analysis of both CNN and physical system interconnect. It also provides an introduction to a range of CNN models and looks a t what each requires. Finally, different possible implementation strategies are considered and a solution proposed that offers good performance for many CNN models.

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