Accelerating design space exploration

The size of search spaces in embedded system design is one of the most critical problems during design space exploration. Pareto-Front Arithmetics (PFA) has shown to be useful to overcome this problem by decomposing a hierarchical search space and just exploring each part of the system separately. Later, the exploration results are combined at higher levels of the hierarchy. In order to decrease the exploration time, this combination is performed in the objective space only. In general, this will lead to suboptimal and infeasible results. In this paper, we present new results regarding the trade-off between the quality of the results and the exploration time.