Value locality and speculative execution

pipelined memory subsystem which allows any number of nonblocking misses (this is more aggressive than the actual 21164 and will tend to understate the benefits of value predictionbased speculation). Second, in order to allow value prediction-based speculation to occur, we must verify predictions by comparing the predicted value to the actual value computed by the ALU. This comparison requires an extra stage before writeback. The third modification, the addition of the reissue buffer, allows us to buffer instruction dispatch groups that contain value-predicted instructions. With this feature, we are able to redispatch instructions when a misprediction occurs with only a single-cycle penalty. Figure 2-1. PPC 620 and 620+ Block Diagram. Buffer sizes shown as (620/620+). LSU SCFX RS (2/4) Comp Unit (16/32) Fetch/Dispatch Unit

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