论文信息 - Design and benchmarking of BCPMOS versus SCPMOS for an evolutionary 0.25-/spl mu/m CMOS technology

Design and benchmarking of BCPMOS versus SCPMOS for an evolutionary 0.25-/spl mu/m CMOS technology

TCAD tools were used to design and benchmark 0.25-/spl mu/m buried-channel PMOS (BCPMOS) versus surface-channel PMOS (SCPMOS), for both device and circuit performance. With optimized device designs, BCPMOS gives smaller gate delays than SCPMOS for INVERTER and NAND gates with supply voltages V/sub DD/>1.4 V, and for NOR gates with V/sub DD/>2.4 V.

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