Design and Implementation of a New Multilevel

Multilevel inverters have been widely accepted for high-power high-voltage applications. Their performance is highly superior to that of conventional two-level inverters due to re- duced harmonic distortion, lower electromagnetic interference, and higher dc link voltages. However, it has some disadvantages such as increased number of components, complex pulsewidth modulation control method, and voltage-balancing problem. In this paper, a new topology with a reversing-voltage component is proposed to improve the multilevel performance by compen- sating the disadvantages mentioned. This topology requires fewer components compared to existing inverters (particularly in higher levels) and requires fewer carrier signals and gate drives. There- fore, the overall cost and complexity are greatly reduced partic- ularly for higher output voltage levels. Finally, a prototype of the seven-level proposed topology is built and tested to show the performance of the inverter by experimental results. Index Terms—Multilevel inverter, power electronics, SPWM, topology.

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