AStErIx : An Interactive Environment for Logic Synthesis and Analysis
暂无分享,去创建一个
[1] Fabio Somenzi,et al. CUDD: CU Decision Diagram Package Release 2.2.0 , 1998 .
[2] Georg Sander,et al. Graph Layout through the VCG Tool , 1994, GD.
[3] Emden R. Gansner,et al. A Technique for Drawing Directed Graphs , 1993, IEEE Trans. Software Eng..
[4] Kurt Mehlhorn,et al. LEDA: a platform for combinatorial and geometric computing , 1997, CACM.
[5] Robert K. Brayton,et al. Sequential circuit design using synthesis and optimization , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.
[6] M. Pedram,et al. POSE: power optimization and synthesis environment , 1996, 33rd Design Automation Conference Proceedings, 1996.
[7] Ricardo Pezzuol Jacobi,et al. A Rapid Boolean Technology Mapping applicable to Power Minimization , 1997 .