VCO Design With On-Chip Calibration System

This paper presents a low-supply voltage integrated CMOS voltage-controlled oscillator (VCO) with an on-chip digital VCO calibration control system. The VCO utilizes various state-of-the-art design methods to achieve low phase noise. The calibration system includes a novel high-speed digital divide by two circuit and a counter running on 1-GHz input to enable on-chip frequency measurement. An arithmetic unit and algorithms to perform the calibration are implemented using on-chip logic. Two different types of calibration methods have been implemented and measured in order to compare the proposed VCO gain optimization method with more conventional type of VCO calibration. The measurements show that the VCO design has phase noise from -120.5 dBc/Hz to -118.7 dBc/Hz @ 400-kHz offset, measured over the frequency range from 1.67 to 1.93 GHz. The proposed VCO gain optimization method is capable of reducing the KVCO peak-to-peak variation of the presented VCO design from 54.4% to 29.8% in DCS1800 and PCS1900 GSM transmission bands when compared to the conventional type of calibration method

[1]  M. Suzuki,et al.  3.2 GHz, 0.2 mu m gate CMOS 1/8 dynamic frequency divider , 1990 .

[2]  Ran-Hong Yan,et al.  A 13.4-GHz CMOS frequency divider , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

[3]  C. Sodini,et al.  The impact of device type and sizing on phase noise mechanisms , 2005, IEEE J. Solid State Circuits.

[4]  Wang Zhigong,et al.  Design techniques of CMOS SCL circuits for Gb/s applications , 2001, ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549).

[5]  HongMo Wang.  A 1.8 V 3 mW 16.8 GHz frequency divider in 0.25 /spl mu/m CMOS , 2000 .

[6]  Jean-Olivier Plouchart,et al.  Design of wide-band CMOS VCO for multiband wireless LAN applications , 2003, IEEE J. Solid State Circuits.

[7]  M. Ismail,et al.  CMOS PLL calibration techniques , 2004, IEEE Circuits and Devices Magazine.

[8]  G. Li Puma,et al.  A 2-GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization , 2000, IEEE Journal of Solid-State Circuits.

[9]  Kiat Seng Yeo,et al.  RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor , 2004, IEEE Trans. Circuits Syst. II Express Briefs.

[10]  Byeong-Ha Park,et al.  A /spl Sigma/-/spl Delta/ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications , 2004 .

[11]  S. Lloyd,et al.  A 0.18 /spl mu/m SiGe BiCMOS UHF VCO with auto tuning for DCT AMPS and CDMA application , 2004, 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers.

[12]  Byeong-Ha Park,et al.  A /spl Sigma/-/spl Delta/ fractional-N frequency synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications , 2003, ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705).

[13]  M. Siccardi,et al.  Power supply noise conversion to phase noise in CMOS frequency digital divider , 2002, Proceedings of the 2002 IEEE International Frequency Control Symposium and PDA Exhibition (Cat. No.02CH37234).

[14]  A.A. Abidi,et al.  A 4.5-mW 900-MHz CMOS receiver for wireless paging , 2000, IEEE Journal of Solid-State Circuits.

[15]  Chih-Ming Hung,et al.  An ultra low phase noise GSM local oscillator in a 0.09 /spl mu/m standard digital CMOS process with no high-Q inductors , 2004, 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers.

[16]  Asad A. Abidi,et al.  RF-CMOS oscillators with switched tuning , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

[17]  A. Abidi,et al.  Varactor characteristics, oscillator tuning curves, and AM-FM conversion , 2003, IEEE J. Solid State Circuits.

[18]  R. Y. Chen.  High-speed CMOS frequency divider , 1997 .

[19]  Carlo Samori,et al.  Spectrum folding and phase noise in LC tuned oscillators , 1998 .

[20]  Salvatore Levantino,et al.  Frequency dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion , 2002, IEEE J. Solid State Circuits.

[21]  A.A. Abidi,et al.  Noise in RF-CMOS mixers: a simple physical model , 2000, IEEE Journal of Solid-State Circuits.