Mapping Applications to Tiled Multiprocessor Embedded Systems

Modern multiprocessor embedded systems execute a large number of tasks on shared processors and handle their complex communications on shared communication networks. Traditional methods from the HW /SW codesign or general purpose computing domain cannot be applied any more to cope with this new class of complex systems. To overcome this problem, a framework called Distributed Operation Layer (DOL) is proposed that enables the efficient execution of parallel applications on multiprocessor platforms. Two main services are offered by the DOL: systemlevel performance analysis and multi-objective algorithmarchitecture mapping. This paper presents the basic principles of the DOL, the specification mechanisms for applications, platform and mapping as well as its internal analytic performance evaluation framework. To illustrate the presented concepts, an MPEG -2 decoder case study is presented.

[1]  Edward A. Lee,et al.  Heterogeneous Concurrent Modeling and Design in Java (Volume 1: Introduction to Ptolemy II) , 2008 .

[2]  Marco Laumanns,et al.  SPEA2: Improving the strength pareto evolutionary algorithm , 2001 .

[3]  Luciano Lavagno,et al.  Hardware-software co-design of embedded systems: the POLIS approach , 1997 .

[4]  Luca Benini,et al.  Analyzing on-chip communication in a MPSoC environment , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[5]  Lothar Thiele,et al.  Real-time calculus for scheduling hard real-time systems , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[6]  Stephen A. Edwards,et al.  SHIM: a deterministic model for heterogeneous embedded systems , 2006, IEEE Trans. Very Large Scale Integr. Syst..

[7]  Lothar Thiele,et al.  A framework for evaluating design tradeoffs in packet processing architectures , 2002, DAC '02.

[8]  Lothar Thiele,et al.  Multiobjective evolutionary algorithms: a comparative case study and the strength Pareto approach , 1999, IEEE Trans. Evol. Comput..

[9]  Lothar Thiele,et al.  A general framework for analysing system properties in platform-based embedded system designs , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[10]  Luca Benini,et al.  Combining Simulation and Formal Methods for System-Level Performance Analysis , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[11]  Marco Laumanns,et al.  SPEA2: Improving the Strength Pareto Evolutionary Algorithm For Multiobjective Optimization , 2002 .

[12]  Luciano Lavagno,et al.  Metropolis: An Integrated Electronic System Design Environment , 2003, Computer.

[13]  Sujit Dey,et al.  System-level performance analysis for designing on-chipcommunication architectures , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[14]  Michael I. Gordon,et al.  Exploiting coarse-grained task, data, and pipeline parallelism in stream programs , 2006, ASPLOS XII.

[15]  Gilles Kahn,et al.  The Semantics of a Simple Language for Parallel Programming , 1974, IFIP Congress.

[16]  Marco Laumanns,et al.  PISA: A Platform and Programming Language Independent Interface for Search Algorithms , 2003, EMO.

[17]  David Harel,et al.  Statecharts: A Visual Formalism for Complex Systems , 1987, Sci. Comput. Program..

[18]  Edward A. Lee,et al.  Dataflow process networks , 2001 .

[19]  Rolf Ernst,et al.  System level performance analysis - the SymTA/S approach , 2005 .

[20]  Ed F. Deprettere,et al.  Exploring Embedded-Systems Architectures with Artemis , 2001, Computer.

[21]  E.A. Lee,et al.  Synchronous data flow , 1987, Proceedings of the IEEE.

[22]  J. Javier Gutiérrez,et al.  MAST: Modeling and analysis suite for real time applications , 2001, Proceedings 13th Euromicro Conference on Real-Time Systems.

[23]  Stephen Taylor,et al.  A Practical Approach to Dynamic Load Balancing , 1998, IEEE Trans. Parallel Distributed Syst..

[24]  Rudy Lauwereins,et al.  Design, Automation, and Test in Europe , 2008 .

[25]  Luciano Lavagno,et al.  Hardware-Software Co-Design of Embedded Systems , 1997 .

[26]  Marcel Verhoef,et al.  System architecture evaluation using modular performance analysis: a case study , 2006, International Journal on Software Tools for Technology Transfer.