Device for correcting peak shift

PURPOSE: To realize digital recording with a low error ratio. CONSTITUTION: 4 bits (1001) from the top of parallel data outputted from a shift register part 2 are latched in a before 4 bits data buffer part 3 and 4 bits (0011) after shifting by 1 bit are latched in a present 4 bits data buffer 4. The pattern information of the before 4 bits data buffer part 3 and the present 4 bits data buffer part 4 are inputted to a data pattern check circuit 5 and a bit generated by peak shift is found and correction amt. data is drawn from a correction amt. data buffer part 6 and inputted to a correction circuit 7. Then, optimum write correction is possible by recognizing in 4 bits while shifting at every 1 bit at a correcting time and deciding a correction amt. from distances with before and behind bits and the error ratio is reduced. COPYRIGHT: (C)1993,JPO&Japio