Analytical Optimization of Bit-Widths in Fixed-Point LTI Systems

Analyses of range and precision are important for high-level synthesis and verification of fixed-point circuits. Conventional range and precision analysis methods mostly focus on combinational arithmetic circuits and suffer from major inefficiencies when dealing with sequential linear-time-invariant circuits. Such problems mainly include inability to analyze precision when quantization of constant coefficients is taken into account, and lacking efficient word-length optimization algorithms to handle both variables and constants, while satisfying the error metrics. The algorithms presented in this paper solve these problems. Experiments illustrate the efficiency and robustness of our algorithms.

[1]  Katarzyna Radecka,et al.  Optimization of Imprecise Circuits Represented by Taylor Series and Real-Valued Polynomials , 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[2]  Miroslav D. Lutovac,et al.  Design of multiplierless elliptic IIR filters with a small quantization error , 1999, IEEE Trans. Signal Process..

[3]  Seehyun Kim,et al.  Fixed-point optimization utility for C and C++ based digital signal processing programs , 1995, VLSI Signal Processing, VIII.

[4]  C. Weinstein.  QUANTIZATION EFFECTS IN DIGITAL FILTERS , 1969 .

[5]  O. Sarbishei,et al.  Analysis of Mean-Square-Error (MSE) for fixed-point FFT units , 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

[6]  Wayne Luk,et al.  Unifying bit-width optimisation for fixed-point and floating-point designs , 2004, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

[7]  Katarzyna Radecka,et al.  Design verification by test vectors and arithmetic transform universal test set , 2004, IEEE Transactions on Computers.

[8]  Leland B. Jackson,et al.  On the interaction of roundoff noise and dynamic range in digital filters , 1970, Bell Syst. Tech. J..

[9]  Katarzyna Radecka,et al.  Using arithmetic transform for verification of datapath circuits via error modeling , 2000, Proceedings 18th IEEE VLSI Test Symposium.

[10]  A. Sripad,et al.  A necessary and sufficient condition for quantization errors to be uniform and white , 1977 .

[11]  Wonyong Sung.  Optimization of Number Representations , 2013, Handbook of Signal Processing Systems.

[12]  Katarzyna Radecka,et al.  Arithmetic Transforms of Imprecise Datapaths by Taylor Series Conversion , 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

[13]  Romuald Rocher,et al.  Analytical accuracy evaluation of fixed-point systems , 2007, 2007 15th European Signal Processing Conference.

[14]  John G. Proakis,et al.  Digital Signal Processing: Principles, Algorithms, and Applications , 1992 .

[15]  Richard M. Jiang,et al.  An Area-Efficient FFT Architecture for OFDM Digital Video Broadcasting , 2007, IEEE Transactions on Consumer Electronics.

[16]  Daniel Ménard,et al.  Automatic evaluation of the accuracy of fixed-point algorithms , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[17]  Mark Zwolinski,et al.  Symbolic noise analysis approach to computational hardware optimization , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[18]  Wayne Luk,et al.  Ieee Transactions on Computer-aided Design of Integrated Circuits and Systems Accuracy Guaranteed Bit-width Optimization Abstract— We Present Minibit, an Automated Static Approach for Optimizing Bit-widths of Fixed-point Feedforward Designs with Guaranteed Accuracy. Methods to Minimize Both the In- , 2022 .

[19]  W. Luk,et al.  Truncation noise in fixed-point SFGs , 1999 .

[20]  O. Sarbishei,et al.  Analysis of range and precision for fixed-point linear arithmetic circuits with feedbacks , 2010, 2010 IEEE International High Level Design Validation and Test Workshop (HLDVT).

[21]  Zeljko Zilic,et al.  A Multiple-Valued Reed-Muller Transform for Incompletely Specified Functions , 1995, IEEE Trans. Computers.

[22]  Nicola Nicolici,et al.  Bit-Width Allocation for Hardware Accelerators for Scientific Computing Using SAT-Modulo Theory , 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[23]  Romuald Rocher,et al.  Analytical Fixed-Point Accuracy Evaluation in Linear Time-Invariant Systems , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

[24]  Katarzyna Radecka,et al.  An efficient hybrid engine to perform range analysis and allocate integer bit-widths for arithmetic circuits , 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

[25]  Robert W. Brodersen,et al.  Automated fixed-point data-type optimization tool for signal processing and communication systems , 2004, Proceedings. 41st Design Automation Conference, 2004..

[26]  Wayne Luk,et al.  The Multiple Wordlength Paradigm , 2001, The 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'01).

[27]  A. Oppenheim,et al.  Effects of finite register length in digital filtering and the fast Fourier transform , 1972 .

[28]  E. Dubois,et al.  Design of multidimensional finite-wordlength FIR and IIR filters by simulated annealing , 1995 .

[29]  O. Sarbishei,et al.  On the Fixed-Point Accuracy Analysis and Optimization of FFT Units with CORDIC Multipliers , 2011, 2011 IEEE 20th Symposium on Computer Arithmetic.

[30]  Truong Q. Nguyen,et al.  On the Fixed-Point Accuracy Analysis of FFT Algorithms , 2008, IEEE Transactions on Signal Processing.

[31]  W. Luk,et al.  Truncation noise in fixed-point SFGs [digital filters] , 1999 .

[32]  P. Taneli Harju.  Finite wordlength implementation of IIR polynomial predictive filters , 1997 .

[33]  Wonyong Sung,et al.  Combined word-length optimization and high-level synthesis ofdigital signal processing systems , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[34]  O. Sarbishei,et al.  Analysis of precision for scaling the intermediate variables in fixed-point arithmetic circuits , 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[35]  Joan Carletta,et al.  Determining appropriate precisions for signals in fixed-point IIR filters , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[36]  D. M. Chibisov,et al.  Distribution of rounding error in multiplication of two numbers on a fixed point computer , 1967 .

[37]  Wayne Luk,et al.  Wordlength optimization for linear digital signal processing , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[38]  Gabriel Caffarena,et al.  SQNR Estimation of Fixed-Point DSP Algorithms , 2010, EURASIP J. Adv. Signal Process..

[39]  Alok N. Choudhary,et al.  Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.