The effect of interconnect scaling and low-k dielectric on the thermal characteristics of the IC metal

The effect of interconnect scaling and low-k dielectric on the thermal characteristics of interconnect structures has been characterized for the first time under DC and pulsed current conditions. It is shown that under DC conditions the thermal impedance of metal lines increases by about 10% when low-k dielectric is used as the gap fill. The critical current density for the low-k structures under pulsed condition is shown to be about 10-30% lower than that of standard dielectric structures depending on metal and pulse widths.

[1]  P. K. Vasudev,et al.  Reliability and electrical properties of new low dielectric constant interlevel dielectrics for high performance ULSI interconnect , 1996, Proceedings of International Reliability Physics Symposium.

[2]  W. Hunter.  The implications of self-consistent current density design guidelines comprehending electromigration and Joule heating for interconnect technology evolution , 1995, Proceedings of International Electron Devices Meeting.

[3]  M. Bohr.  Interconnect scaling-the real limiter to high performance ULSI , 1995, Proceedings of International Electron Devices Meeting.

[4]  Sung-Mo Kang,et al.  EOS/ESD reliability of deep sub-micron NMOS protection devices , 1995, Proceedings of 1995 IEEE International Reliability Physics Symposium.

[5]  Kimiaki Shimokawa,et al.  Reduction of wiring capacitance with new low dielectric SiOF interlayer film for high speed/low power sub-half micron CMOS , 1994, Proceedings of 1994 VLSI Technology Symposium.

[6]  C. Hu,et al.  Characterization of VLSI circuit interconnect heating and failure under ESD conditions , 1996, Proceedings of International Reliability Physics Symposium.

[7]  Charvaka Duvvury,et al.  Trends for deep submicron VLSI and their implications for reliability , 1995, Proceedings of 1995 IEEE International Reliability Physics Symposium.