Techniques to introduce of electron beam direct writing (EBDW) technology into the volume production lines for the 65 nm process technology are shown and discussed. In order to apply these techniques in a harmonious way, partial modifications to the current production line infrastructures are required, because those infrastructures have been optimized for the conventional photolithography technology. One of the large differences is with the alignment. For the gate layer, the appropriate solution is to have an additional process step to remove SiO2 material filled in the shallow trench isolation alignment marks before the patterning. For the dual damascene process at the metal layers, careful consideration of the choice between the indirect alignment or the direct alignment is necessary, when the metal layer is aligned to the previous via layer underneath. We expect that these techniques can be used for the advanced node devices as well, while some new structures would be applied on these devices. In addition to the optimizing the alignment mark structures, the appropriate adjustment of EBDW system parameters by advanced process control (APC) is required, in order to have enough overlay accuracy at the actual production use. Although such process control systems are normally optimized to photolithography, we have confirmed that APC system can be also used for the EBDW technology for appropriate overlay accuracy control. Furthermore, the alignment budget in our systems is created and the alignment accuracy in our future system is estimated based on it. Based on the findings from these discussions, we expect that the EBDW with e-beam-only alignment will be applicable for the production of the 11 nm half-pitch process technology node and the beyond.
[1]
M. Broekaart,et al.
Manufacturing concerns for advanced CMOS circuit realization EBDW alternative solution for cost and cycle time reductions
,
2004,
SPIE Advanced Lithography.
[2]
Yoshio Ito,et al.
Study of device mass production capability of the character projection based electron beam direct writing process technology toward 14 nm node and beyond
,
2012,
Advanced Lithography.
[3]
M. Broekaart,et al.
Electron beam direct write lithography flexibility for ASIC manufacturing: an opportunity for cost reduction (Keynote Paper)
,
2005,
SPIE Advanced Lithography.
[4]
Shinji Sugatani,et al.
Electron Beam Direct Writing technology for LSI prototyping business
,
2010
.
[5]
S. Purushothaman,et al.
Looking into the crystal ball: future device learning using hybrid e-beam and optical lithography (Keynote Paper)
,
2005,
SPIE Advanced Lithography.
[6]
Harald Bosse,et al.
E-beam direct write alignment strategies for the next generation node
,
2008,
SPIE Advanced Lithography.
[7]
M. Tesauro,et al.
Design verification for sub-70-nm DRAM nodes via metal fix using E-beam direct write
,
2009,
European Mask and Lithography Conference.
[8]
M. Broekaart,et al.
Advanced patterning studies using shaped e-beam lithography for 65-nm CMOS preproduction
,
2003,
SPIE Advanced Lithography.
[9]
Yves Laplanche,et al.
Mix and match capability of e-beam direct-write for the 65-nm technology
,
2003,
SPIE Advanced Lithography.