Chip-level wireless power transfer scheme design for next generation wireless interconnected three-dimensional integrated circuits

In this paper, we propose chip-level wireless power transfer (WPT) scheme for the next generation high density wireless three-dimensional (3-D) semiconductor packaging technology. We designed a transmitter coil on an active silicon interposer embedded in a PCB-package and a receiver coil on a processor die. The proposed WPT scheme used magnetic-field resonance coupling for high power transfer efficiency. We fabricated a full-bridge rectifier and a low-dropout regulator (LDO) to make a stable DC power for a voltage-controlled oscillator (VCO) on the processor die using SK/Hynix 0.18 μm CMOS process. A VCO is key circuit block consisting of a PLL for clock generation to synchronize data transfer between a processor and a memory controller. The designed VCO successfully generated 1.6 GHz signal using the power from the proposed chiplevel WPT scheme.

[1]  Zuow-Zun Chen,et al.  The Design and Analysis of Dual-Delay-Path Ring Oscillators , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

[2]  C. Yue,et al.  On-chip Spiral Inductors With Patterned Ground Shields For Si-based RF IC's , 1997, Symposium 1997 on VLSI Circuits.

[3]  P. Gamand,et al.  A Two-Stage Ring Oscillator in 0.13- $\mu{\hbox{m}}$ CMOS for UWB Impulse Radio , 2009, IEEE Transactions on Microwave Theory and Techniques.

[4]  K. N. Tu,et al.  Reliability challenges in 3D IC packaging technology , 2011, Microelectron. Reliab..

[5]  P. Gamand,et al.  A Two-Stage Ring Oscillator in 0 . 13-� m CMOS for UWB Impulse Radio , 2009 .

[6]  Howard C. Luong,et al.  A 900-MHz CMOS low-phase-noise voltage-controlled ring oscillator , 2001 .

[7]  Kyutae Lim,et al.  A ring VCO with wide and linear tuning characteristics for a cognitive radio system , 2008, 2008 IEEE Radio Frequency Integrated Circuits Symposium.

[8]  Cheng-Kok Koh,et al.  Exact closed-form formula for partial mutual inductances of rectangular conductors , 2003 .

[9]  Madhavan Swaminathan,et al.  Book review: Design and modeling for 3D ICs and interposers , 2013, IEEE Electromagnetic Compatibility Magazine.

[10]  K Rupp,et al.  The Economic Limit to Moore's Law , 2011, IEEE Transactions on Semiconductor Manufacturing.

[11]  Paul D. Franzon,et al.  4 Gbps high-density AC coupled interconnection , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

[12]  Tae Gyu Chang,et al.  Designing a Ring-VCO for RFID Transponders in 0.18 μm CMOS Process , 2014, TheScientificWorldJournal.

[13]  Seok-Kyun Han,et al.  A Low-Noise Four-Stage Voltage-Controlled Ring Oscillator in Deep-Submicrometer CMOS Technology , 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.