An Optimal Approach to Hardware/Software Partitioning for Synchronous Model
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Wang Yi | Jifeng He | Geguang Pu | Dang Van Hung | W. Yi | G. Pu | D. Hung | J. He
[1] Jifeng He,et al. An Approach to the Specification and Verification of a Hardware Compilation Scheme , 2001, The Journal of Supercomputing.
[2] Grzegorz Rozenberg,et al. Theory of Traces , 1988, Theor. Comput. Sci..
[3] Markus Weinhardt,et al. Integer Programming for Partitioning in Software Oriented Codesign , 1995, FPL.
[4] Luciano Lavagno,et al. Hardware-Software Co-Design of Embedded Systems , 1997 .
[5] Rajeev Alur,et al. A Theory of Timed Automata , 1994, Theor. Comput. Sci..
[6] Thomas A. Henzinger,et al. HYTECH: a model checker for hybrid systems , 1997, International Journal on Software Tools for Technology Transfer.
[7] Stavros Tripakis,et al. Kronos: A Model-Checking Tool for Real-Time Systems , 1998, CAV.
[8] Wayne Wolf,et al. Hardware-software co-design of embedded systems , 1994, Proc. IEEE.
[9] Peter Marwedel,et al. An Algorithm for Hardware/Software Partitioning Using Mixed Integer Linear Programming , 1997, Des. Autom. Embed. Syst..
[10] Barbara Koroušić Seljak,et al. Efficient Task Scheduling Approach Relevant to the Hardware/Software Co-Design of Embedded System , 2000 .
[11] Thomas A. Henzinger,et al. HYTECH: A Model Checker for Hybrid Systems , 1997, CAV.
[12] Garrison W. Greenwood,et al. Preference-driven hierarchical hardware/software partitioning , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).
[13] Krzysztof Kuchcinski,et al. An algorithm for partitioning of application specific systems , 1993, 1993 European Conference on Design Automation with the European Event in ASIC Design.
[14] Ansgar Fehnker. Bounding and heuristics in forward reachability algorithms , 2000 .
[15] Kim G. Larsen,et al. Minimum-Cost Reachability for Priced Timed Automata , 2001, HSCC.
[16] David L. Dill,et al. Timing Assumptions and Verification of Finite-State Concurrent Systems , 1989, Automatic Verification Methods for Finite State Systems.
[17] Wang Yi,et al. Uppaal in a nutshell , 1997, International Journal on Software Tools for Technology Transfer.
[18] Thomas A. Henzinger,et al. Symbolic Model Checking for Real-Time Systems , 1994, Inf. Comput..
[19] Augusto Sampaio,et al. ParTS: A Partitioning Transformation System , 1999, World Congress on Formal Methods.
[20] Wolfgang Rosenstiel,et al. A method for partitioning UNITY language in hardware and software , 1994, EURO-DAC '94.
[21] Wayne Wolf,et al. Hardware/Software Co-Design: Principles and Practice , 1997 .
[22] Gerd Behrmann,et al. Efficient Guiding Towards Cost-Optimality in UPPAAL , 2001, TACAS.
[23] He Jifeng,et al. An algebraic approach to hardware/software partitioning , 2000, ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445).
[24] Kim G. Larsen,et al. Guided Synthesis of Control Programs Using UPPAAL , 2000, Nord. J. Comput..
[25] Stavros Tripakis,et al. KRONOS: A Model-Checking Tool for Real-Time Systems (Tool-Presentation for FTRTFT '98) , 1998, FTRTFT.
[26] Dang Van Hung,et al. Real-Time Systems Development with Duration Calculi: An Overview , 2002, 10th Anniversary Colloquium of UNU/IIST.
[27] Rajesh K. Gupta,et al. Data-flow assisted behavioral partitioning for embedded systems , 1997, DAC.