Jitter in oscillators with 1/f noise sources
暂无分享,去创建一个
[1] R. Jayaraman,et al. MOS Electrical characteristics of low pressure re-oxidized nitrided-oxide , 1986, 1986 International Electron Devices Meeting.
[2] P. R. Gray,et al. A 900 MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications , 2000 .
[3] M. J. Deen,et al. Channel noise modeling of deep submicron MOSFETs , 2002 .
[4] Hyungcheol Shin,et al. Analytical Thermal Noise Model of Deep-submicron MOSFETs , 2006 .
[5] Dan H. Wolaver,et al. Phase-Locked Loop Circuit Design , 1991 .
[6] C. L. Searle,et al. Some aspects of the theory and measurement of frequency fluctuations in frequency standards , 1965 .
[7] Ook Kim,et al. A 1.8-GHz self-calibrated phase-locked loop with precise I/Q matching , 2001, IEEE J. Solid State Circuits.
[8] Shen-Iuan Liu,et al. A wide-range and fast-locking all-digital cycle-controlled delay-locked loop , 2005 .
[9] J. Johnson,et al. The Schottky Effect in Low Frequency Circuits , 1925 .
[10] M. Sachdev,et al. An analytical equation for the oscillation frequency of high-frequency ring oscillators , 2004, IEEE Journal of Solid-State Circuits.
[11] A. Sedra. Microelectronic circuits , 1982 .
[12] M. J. Deen,et al. MOSFET modeling for low noise, RF circuit design , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).
[13] Elena Trichina,et al. Supplemental Cryptographic Hardware for Smart Cards , 2001, IEEE Micro.
[14] Bruce Schneier,et al. Practical cryptography , 2003 .
[15] Hyoungsik Nam,et al. A 64-Mbit, 640-MByte/s bidirectional data strobed, double-data-rate SDRAM with a 40-mW DLL for a 256-MByte memory system , 1998, IEEE J. Solid State Circuits.
[16] H. C. Yang,et al. A low jitter 0.3-165 MHz CMOS PLL frequency synthesizer for 3 V/5 V operation , 1997 .
[17] J. Bokor,et al. Nanoscale ultra-thin-body silicon-on-insulator P-MOSFET with a SiGe/Si heterostructure channel , 2000, IEEE Electron Device Letters.
[18] S. K. Park,et al. Random number generators: good ones are hard to find , 1988, CACM.
[19] B. Lai,et al. A Monolithic 622Mb/s Clock Extraction Data Retiming Circuit , 1991, 1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[20] B. Razavi,et al. A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector , 2001, IEEE J. Solid State Circuits.
[21] M. J. Kumar,et al. Controlling short-channel effects in deep-submicron SOI MOSFETs for improved reliability: a review , 2004, IEEE Transactions on Device and Materials Reliability.
[22] P. Klein,et al. An analytical thermal noise model of deep submicron MOSFET's , 1999, IEEE Electron Device Letters.
[23] Floyd M. Gardner,et al. Phaselock techniques , 1984, IEEE Transactions on Systems, Man, and Cybernetics.
[24] J.G. Maneatis,et al. Low-jitter and process independent DLL and PLL based on self biased techniques , 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
[25] I. Lundström,et al. Low frequency noise in MOS transistors—I Theory , 1968 .
[26] Beomsup Kim,et al. Analysis of timing jitter in CMOS ring oscillators , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.
[27] L.K.J. Vandamme,et al. Experimental studies on 1/f noise , 1981 .
[28] F. Hooge. 1/ƒ noise is no surface effect , 1969 .
[29] Gerard Ghibaudo,et al. Improved Analysis of Low Frequency Noise in Field‐Effect MOS Transistors , 1991 .
[31] Kim Fung Tsang,et al. Phase noise measurement of free-running microwave oscillators at 5.8 GHz using 1/3-subharmonic injection locking , 2005 .
[32] E. P. Vandamme,et al. Critical discussion on unified 1/f noise models for MOSFETs , 2000 .
[33] Zou Xiao. Threshold Voltage Model for Deep-Submicrometer MOSFET's , 2005 .
[34] Lizhong Sun,et al. A 1.25-GHz 0.35-μm monolithic CMOS PLL based on a multiphase ring oscillator , 2001, IEEE J. Solid State Circuits.
[35] Ping-Keung Ko,et al. Inversion-layer capacitance and mobility of very thin gate-Oxide MOSFET's , 1986 .
[36] C. Hu,et al. Threshold voltage model for deep-submicrometer MOSFETs , 1993 .
[37] W. P. Robins,et al. Phase Noise in Signal Sources , 1984 .
[38] A. Demir. Phase noise and timing jitter in oscillators with colored-noise sources , 2002 .
[39] A. Hajimiri,et al. Jitter and phase noise in ring oscillators , 1999, IEEE J. Solid State Circuits.
[40] Thomas E. Tkacik. A Hardware Random Number Generator , 2002, CHES.
[41] Y. Tosaka,et al. Analytical surface potential expression for thin-film double-gate SOI MOSFETs , 1994 .
[42] Howard C. Luong,et al. A 2-V 900-MHz monolithic CMOS dual-loop frequency synthesizer for GSM receivers , 2001 .
[43] R. Jindal. Hot-electron effects on channel thermal noise in fine-line NMOS field-effect transistors , 1986, IEEE Transactions on Electron Devices.
[44] Robert G. Meyer,et al. An engineering model for short-channel MOS devices , 1988 .
[45] F. Berz,et al. Theory of low frequency noise in Si MOST's , 1970 .
[46] Ping-Keung Ko,et al. A physics-based MOSFET noise model for circuit simulators , 1990 .
[47] Un-Ku Moon,et al. A CMOS self-calibrating frequency synthesizer , 2000, IEEE Journal of Solid-State Circuits.
[48] K. Shanmugan,et al. Random Signals: Detection, Estimation and Data Analysis , 1988 .
[49] R. Kingston,et al. Semiconductor surface physics , 1957 .
[50] Y. Tsividis. Operation and modeling of the MOS transistor , 1987 .
[51] A. R. Newton,et al. Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas , 1990 .
[52] Henry W. Ott,et al. Noise Reduction Techniques in Electronic Systems , 1976 .
[53] C. Schulien,et al. Clock and data recovery IC for 40 Gb/s fiber-optic receiver , 2001, GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191).
[54] B. Razavi. LowJitter ProcessIndependent DLL and PLL Based on SelfBiased Techniques , 2003 .
[55] John A. McNeill. Jitter in ring oscillators , 1997 .
[56] A.M. Davis,et al. Microelectronic circuits , 1983, Proceedings of the IEEE.
[57] Dwight B. Davis. Tektronix Inc. , 1993 .
[58] Alessandro Trifiletti,et al. A High-Speed Oscillator-Based Truly Random Number Source for Cryptographic Applications on a Smart Card IC , 2003, IEEE Trans. Computers.
[59] Sameer R. Sonkusale,et al. High speed array of oscillator-based truly binary random number generators , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).
[60] David Paul Maher,et al. Random Number Generators Founded on Signal and Information Theory , 1999, CHES.
[61] S. T. Hsu. Surface state related noise in MOS transistors , 1970 .
[62] Kwangseok Han,et al. Thermal noise modeling for short-channel MOSFETs , 2003, International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003..
[63] Cor Claeys,et al. On the flicker noise in submicron silicon MOSFETs , 1999 .
[64] R. Jacob Baker,et al. CMOS Circuit Design, Layout, and Simulation , 1997 .
[65] R. N. Lincoln,et al. Short-term frequency stability: Characterization, theory, and measurement , 1972 .
[66] C. Hu,et al. A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors , 1990 .
[67] David A. Johns,et al. Analog Integrated Circuit Design , 1996 .
[68] Kiat Seng Yeo,et al. Impact of technology scaling on the 1/f noise of thin and thick gate oxide deep submicron NMOS transistors , 2004 .
[69] Chengxin Liu Chengxin Liu,et al. Jitter in deep submicron CMOS single-ended ring oscillators , 2003, ASIC, 2003. Proceedings. 5th International Conference on.
[70] A. Demir,et al. Phase noise in oscillators: a unifying theory and numerical methods for characterization , 2000 .
[71] Paul C. Kocher,et al. The intel random number generator , 1999 .
[72] T. Hsiang,et al. Study of 1/f noise in N-MOSFET's: Linear region , 1985, IEEE Transactions on Electron Devices.
[73] K. W. Martin,et al. A 6-GHz integrated phase-locked loop using AlGaAs/GaAs heterojunction bipolar transistors , 1992 .
[74] Tso-Ping Ma,et al. The impact of device scaling on the current fluctuations in MOSFET's , 1994 .
[75] R. B. Watson,et al. Clock buffer chip with multiple target automatic skew compensation , 1995 .
[76] Ali Hajimiri,et al. A general theory of phase noise in electrical oscillators , 1998 .
[77] Karem A. Sakallah,et al. Analytical transient response of CMOS inverters , 1992 .
[78] Milos Drutarovský,et al. True Random Number Generator Embedded in Reconfigurable Hardware , 2002, CHES.
[79] A.A. Abidi,et al. High-frequency noise measurements on FET's with small dimensions , 1986, IEEE Transactions on Electron Devices.
[80] L.K.J. Vandamme,et al. Model for 1/f; noise in MOS transistors biased in the linear region , 1980 .
[81] Manuel Blum,et al. A Simple Unpredictable Pseudo-Random Number Generator , 1986, SIAM J. Comput..
[82] M. Jagadesh Kumar,et al. Diminished Short Channel Effects in Nanoscale Double-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect-Transistors due to Induced Back-Gate Step Potential , 2005 .
[83] Kwangseok Han,et al. Analytical drain thermal noise current model valid for deep submicron MOSFETs , 2004 .
[84] Charles G. Sodini,et al. An optimized 850 degrees C low-pressure-furnace reoxidized nitrided oxide (ROXNOX) process , 1991 .
[85] John A. McNeill,et al. Single-ended to differential converter for multiple-stage single-ended ring oscillators , 2003 .
[86] D. Leeson. A simple model of feedback oscillator noise spectrum , 1966 .
[87] Charles G. Sodini,et al. 1/f noise interpretation of the effect of gate oxide nitridation and reoxidation in dielectric traps , 1990 .
[88] Takuji Nishimura,et al. Mersenne twister: a 623-dimensionally equidistributed uniform pseudo-random number generator , 1998, TOMC.
[89] Kwyro Lee,et al. A novel high-speed ring oscillator for multiphase clock generation using negative skewed delay scheme , 1997, IEEE J. Solid State Circuits.
[90] Frank Herzel,et al. An analytical model for the power spectral density of a voltage-controlled oscillator and its analogy to the laser linewidth theory , 1998 .
[91] D.B.M. Klaassen,et al. Accurate thermal noise model for deep-submicron CMOS , 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).
[92] Shen-Iuan Liu,et al. A wide-range and fast-locking all-digital cycle-controlled delay-locked loop , 2005, IEEE Journal of Solid-State Circuits.
[93] Thomas H. Lee,et al. The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES , 2003 .
[94] Tae-Ju Lee,et al. A 155-MHz clock recovery delay- and phase-locked loop , 1992 .
[95] C.L. Portmann,et al. Power-efficient metastability error reduction in CMOS flash A/D converters , 1995, Digest of Technical Papers., Symposium on VLSI Circuits..
[96] Gleb V. Klimovitch. Near-carrier oscillator spectrum due to flicker and white noise , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).
[97] K. Y. Lim,et al. A general approach to compact threshold voltage formulation based on 2D numerical simulation and experimental correlation for deep-submicron ULSI technology development [CMOS] , 2000 .
[98] Alan B. Grebene,et al. Analog Integrated Circuit Design , 1978 .
[99] X. Zhou,et al. PHYSICS-BASED THRESHOLD VOLTAGE MODELING WITH REVERSE SHORT CHANNEL EFFECT , 2001 .
[100] Bruce Schneier,et al. Cryptanalytic Attacks on Pseudorandom Number Generators , 1998, FSE.
[101] Elaine B. Barker,et al. A Statistical Test Suite for Random and Pseudorandom Number Generators for Cryptographic Applications , 2000 .
[102] Ramesh Harjani,et al. Enhanced analytic noise model for RF CMOS design , 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).
[103] Chung Ming Yuen,et al. Phase noise measurement of free-running microwave oscillators at 5.8 GHz using 1/3-subharmonic injection locking , 2005, IEEE Microwave and Wireless Components Letters.
[104] J. Rutman. Characterization of phase and frequency instabilities in precision frequency sources: Fifteen years of progress , 1978, Proceedings of the IEEE.
[105] Lode K. J. Vandamme,et al. Model for 1/f noise in metal‐oxide‐semiconductor transistors , 1981 .
[106] Ping-Keung Ko,et al. New insight into high-field mobility enhancement of nitrided-oxide N-MOSFET's based on noise measurement , 1994 .
[107] Hao Zheng,et al. Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts , 2003, CHES.