Performance and new effects in advanced SOI devices and materials
暂无分享,去创建一个
[1] P. Dollfus,et al. Comparison of multiple-gate MOSFET architectures using Monte Carlo simulation , 2005, cond-mat/0505168.
[2] D. Munteanu,et al. 3D quantum modeling and simulation of multiple-gate nanowire MOSFETs , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[3] L. Selmi,et al. Enhanced ballisticity in nano-MOSFETs along the ITRS roadmap: a Monte Carlo study , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[4] T. Tanaka,et al. Scalability study on a capacitorless 1T-DRAM: from single-gate PD-SOI to double-gate FinDRAM , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[5] I. Aberg,et al. High electron and hole mobility enhancements in thin-body strained Si/strained SiGe/strained Si heterostructures on insulator , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[6] Ying Zhang,et al. Selectively formed high mobility strained Ge PMOSFETs for high performance CMOS , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[7] C. Ouyang,et al. Performance comparison and channel length scaling of strained Si FETs on SiGe-on-insulator (SGOI) , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[8] T. Tezuka,et al. Performance enhancement of partially- and fully-depleted strained-SOI MOSFETs and characterization of strained-Si device parameters , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[9] Chang Woo Oh,et al. Sub 30 nm multi-bridge-channel MOSFET (MBCFET) with metal gate electrode for ultra high performance application , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[10] Chi On Chui,et al. Electro-thermal comparison and performance optimization of thin-body SOI and GOI MOSFETs , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[11] S. T. Ng,et al. Impact of surface roughness on silicon and germanium ultra-thin-body MOSFETs , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[12] Y. Nishi,et al. Experimental study of biaxial and uniaxial strain effects on carrier mobility in bulk and ultrathin-body SOI MOSFETs , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
[13] J.J. Lee,et al. Mobility enhancement of SSOI devices fabricated with sacrificial thin relaxed SiGe , 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).
[14] D. Antoniadis,et al. Assessing the performance limits of ultra-thin double-gate MOSFETs: silicon vs. germanium , 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).
[15] S. Maitrejean,et al. Influence of the mechanical strain induced by a metal gate on electron and hole transport in single and double-gate SOI MOSFETs , 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).
[16] P.C.H. Chan,et al. Characterization of edge direct tunneling leakage of gate misaligned double gate MOSFETs , 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).
[17] A. Kumar,et al. Back-floating gate non-volatile memory , 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).
[18] M. Vinet,et al. Experimental gate misalignment analysis on double gate SOI MOSFETs , 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).
[19] Tsu-Jae King,et al. Full/partial depletion effects in FinFETs , 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).
[20] C. Mazure,et al. Alternative dielectrics for advanced SOI MOSFETs: thermal properties and short channel effects , 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).
[21] S. Haendler,et al. Low frequency noise and hot-carrier reliability in advanced SOI MOSFETs , 2004 .
[22] S. Li,et al. Electrical Characterization of Silicon-On-Insulator Materials and Devices , 1995 .
[23] J. Colinge. Silicon-on-Insulator Technology: Materials to VLSI , 1991 .
[24] F. Balestra,et al. Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance , 1987, IEEE Electron Device Letters.
[25] Michael Specht,et al. Influence of crystal orientation and body doping on trigate transistor performance , 2006 .
[26] Massimo Rudan,et al. Investigating the performance limits of silicon-nanowire and carbon-nanotube FETs , 2005 .