Comprehensive Modeling of Threshold Voltage Variability Induced by Plasma Damage in Advanced Metal-Oxide-Semiconductor Field-Effect Transistors

Threshold voltage shift (ΔVth) and its variation induced by plasma processing were investigated in detail. Two damage mechanisms occurring in an inductively coupled plasma reactor were focused on in this study; the charging damage induced by the conduction current from plasma and the physical damage attributed to the bombardment of high-energy ions. Regarding the charging damage, ΔVth was found to show a power-law dependence on antenna ratio for both SiO2 and high-k gate dielectrics in metal–oxide–semiconductor field-effect transistors (MOSFETs). The observed dependence was also confirmed from the results of a constant-current stress test, indicating that the plasma plays the role of the current source in terms of the charging damage. As for the physical damage, the recess structure in source/drain extension regions was focused on as a possible cause of ΔVth. The depth of the recess (dR) formed by the physical damage was studied using Si wafers exposed to various plasma conditions and subsequently analyzed for surface damage. The recess depth determined from the experiments and classical molecular dynamics simulations exhibits a power-law dependence on potential drop across the sheath between the plasma and the device surface (Vp-Vdc), which is used as a practical measure of the damage. On the basis of the above results, ΔVth due to the physical damage was calculated by technology computer-aided design (TCAD) device simulation for n- and p-channel MOSFETs with the recess structure. ΔVth shows a linear dependence on recess depth for both n- and p-channel MOSFETs, resulting in the power-law dependence on (Vp-Vdc) via dR. These findings provide a simple relationship among the variations of ΔVth, antenna ratio, and plasma parameters. By taking into account the findings that the MOSFET with high-k dielectrics shows a larger ΔVth due to the charging than that with SiO2, and that the MOSFETs with a smaller gate length indicate a larger ΔVth due to the Si recess structure, we can conclude that larger amount of plasma damage induces the larger ΔVth variations, i.e., the Vth variability induced by the plasma damage is difficult to suppress and will become crucial to the fabrication of future advanced devices. The proposed relationship is useful as a guideline to suppress the ΔVth variations caused by plasma damage.

[1]  K. Eriguchi,et al.  A new evaluation method of plasma process-induced Si substrate damage by the voltage shift under constant current injection at metal/Si interface , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

[2]  P. Nicollian,et al.  Negative bias temperature instability mechanism: The role of molecular hydrogen , 2006 .

[3]  Richard D. Braatz,et al.  Mechanism for coupling between properties of interfaces and bulk semiconductors , 2003 .

[4]  S. Vitale,et al.  Reduction of silicon recess caused by plasma oxidation during high-density plasma polysilicon gate etching , 2003 .

[5]  Plasma charging damage on MOS devices with gate insulator of high-dielectric constant material , 2001 .

[6]  Cardona,et al.  Temperature dependence of the dielectric function and interband critical points in silicon. , 1987, Physical review. B, Condensed matter.

[7]  T. Kanashima,et al.  Photoreflectance characterization of the plasma-induced damage in Si substrate , 2000 .

[8]  O. Awadelkarim,et al.  Electrical properties of contact etched p‐Si: A comparison between magnetically enhanced and conventional reactive ion etching , 1994 .

[9]  A. Scarpa,et al.  Effect of charge transport through silicon nitride on thin gate oxide reliability , 2002 .

[10]  K. Noguchi,et al.  Modeling oxide thickness dependence of charging damage by plasma processing , 1993, IEEE Electron Device Letters.

[11]  Koichi Hashimoto,et al.  Charge Damage Caused by Electron Shading Effect , 1994 .

[12]  Satoshi Hamaguchi,et al.  Reducing Damage to Si Substrates during Gate Etching Processes , 2008 .

[13]  Arnold,et al.  Theory of high-field electron transport and impact ionization in silicon dioxide. , 1994, Physical review. B, Condensed matter.

[14]  K. Cheung,et al.  Charging damage from plasma enhanced TEOS deposition , 1995, IEEE Electron Device Letters.

[15]  H. Shibata,et al.  Challenge of low-k materials for 130, 90, 65 nm node interconnect technology and beyond , 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

[16]  G. Kadamati,et al.  Automated antenna detection and correction methodology in VLSI designs , 2003, 2003 8th International Symposium Plasma- and Process-Induced Damage..

[17]  M. Kushner Distribution of ion energies incident on electrodes in capacitively coupled rf discharges , 1985 .

[18]  K. Eriguchi,et al.  Plasma-Induced Defect-Site Generation in Si Substrate and Its Impact on Performance Degradation in Scaled MOSFETs , 2009, IEEE Electron Device Letters.

[19]  K. Eriguchi,et al.  Impacts of plasma process-induced damage on ultra-thin gate oxide reliability , 1997, 1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual.

[20]  K. Eriguchi,et al.  Estimation of defect generation probability in thin Si surface damaged layer during plasma processing , 2008 .

[21]  Vahid Vahedi,et al.  Topographic Dependence Of Plasma Charging Induced Device Damage , 1997, 2nd International Symposium on Plasma Process-Induced Damage.

[22]  S. Samukawa,et al.  Highly selective low-damage processes using advanced neutral beams for porous low-k films , 2005 .

[23]  M. Lieberman,et al.  Ion energy distributions in rf sheaths; review, analysis and simulation , 1999 .

[24]  Jane P. Chang,et al.  Plasma etching of high dielectric constant materials on silicon in halogen chemistries , 2004 .

[25]  Kin P. Cheung,et al.  Plasma Charging Damage , 2000 .

[26]  Fred H. Pollak,et al.  Intrinsic stress and stress gradients at the SiO2/Si interface in structures prepared by thermal oxidation of Si and subjected to rapid thermal annealing , 1989 .

[27]  L. Bernard,et al.  Anomalies of the Energy of Positive Ions Extracted from High‐Frequency Ion Sources. A Theoretical Study , 1968 .

[28]  Direction of topography dependent damage current during plasma etching , 1998, 1998 3rd International Symposium on Plasma Process-Induced Damage (Cat. No.98EX100).

[29]  J. E. Rowe,et al.  Resonant Nonlinear Optical Susceptibility: Electroreflectance in the Low-Field Limit , 1972 .

[30]  Jane P. Chang,et al.  Plasma etching selectivity of ZrO2 to Si in BCl3/Cl2 plasmas , 2003 .

[31]  O. Awadelkarim,et al.  Electrical studies on plasma and reactive-ion-etched silicon , 1989 .

[32]  J.C. Lee,et al.  Comparison of Plasma-Induced Damage in SIO2/TIN and HFO2/TIN Gate Stacks , 2007, 2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual.

[33]  Koji Eriguchi,et al.  Correlation between two time-dependent dielectric breakdown measurements for the gate oxides damaged by plasma processing , 1998 .

[34]  Yuichiro Mitani,et al.  Reconsideration of Hydrogen Release at Ultra Thin Gate Oxide Interface , 2008 .

[35]  S. Mahapatra,et al.  Recent Issues in Negative-Bias Temperature Instability: Initial Degradation, Field Dependence of Interface Trap Generation, Hole Trapping Effects, and Relaxation , 2007, IEEE Transactions on Electron Devices.

[36]  Kazuo Takahashi,et al.  Selective etching of high-k HfO2 films over Si in hydrogen-added fluorocarbon (CF4∕Ar∕H2 and C4F8∕Ar∕H2) plasmas , 2006 .

[37]  Koji Eriguchi,et al.  Comparative Study of Plasma Source-Dependent Charging Polarity in Metal–Oxide–Semiconductor Field Effect Transistors with High-k and SiO2 Gate Dielectrics , 2008 .

[38]  V. Reddy,et al.  Impact of charging damage on negative bias temperature instability , 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

[39]  Kazuo Takahashi,et al.  Etching of High-k Dielectric HfO2 Films in BCl3-Containing Plasmas Enhanced with O2 Addition , 2006 .

[40]  H. Hopman,et al.  Measurement of ion energy distributions at the powered rf electrode in a variable magnetic field , 1990 .

[41]  K. Eriguchi,et al.  Impacts of antenna layout enhanced charging damage on MOSFET reliability and performance , 1996, International Electron Devices Meeting. Technical Digest.

[42]  Srikanth Krishnan,et al.  Antenna protection strategy for ultra-thin gate MOSFETs , 1998, 1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173).

[43]  K. Kondo,et al.  Symmetry analysis and uniaxial-stress effect on the low-field electroreflectance of Si from 3.0 to 4.0 eV , 1976 .

[44]  K. Cheung,et al.  Plasma‐charging damage: A physical model , 1994 .

[45]  C. Hu,et al.  Dependence of plasma-induced oxide charging current on Al antenna geometry , 1992, IEEE Electron Device Letters.

[46]  Gordon E. Moore,et al.  Progress in digital integrated electronics , 1975 .

[48]  Satoshi Hamaguchi,et al.  Molecular dynamics simulation of silicon and silicon dioxide etching by energetic halogen beams , 2001 .

[49]  Gert Moliere,et al.  Theorie der Streuung schneller geladener Teilchen I. Einzelstreuung am abgeschirmten Coulomb-Feld , 1947 .

[50]  A. Rohatgi,et al.  Comparison of the damage and contamination produced by CF4 and CF4/H2 reactive ion etching: the role of hydrogen , 1986 .

[51]  Koji Eriguchi,et al.  Quantitative and comparative characterizations of plasma process-induced damage in advanced metal-oxide-semiconductor devices , 2008 .

[52]  W. Greene,et al.  Magnetron etching of polysilicon: Electrical damage , 1991 .

[53]  C. Cismaru,et al.  Plasma vacuum ultraviolet emission in a high density etcher , 1999, 1999 4th International Symposium on Plasma Process-Induced Damage (IEEE Cat. No.99TH8395).

[54]  Siegfried Selberherr,et al.  Two-dimensional modeling of ion implantation induced point defects , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[55]  W. D. Wilson,et al.  Calculations of nuclear stopping, ranges, and straggling in the low-energy region , 1977 .

[56]  A. Bright,et al.  X‐ray photoemission spectroscopy characterization of silicon surfaces after CF4/H2 magnetron ion etching: Comparisons to reactive ion etching , 1988 .

[57]  J. F. Gibbons,et al.  Ion implantation in semiconductors—Part I: Range distribution theory and experiments , 1968 .

[58]  Koji Eriguchi,et al.  Quantitative Evaluation of Gate Oxide Damage during Plasma Processing Using Antenna-Structure Capacitors , 1994 .

[59]  K. Kano Semiconductor Devices , 1997 .

[60]  K. Eriguchi,et al.  Effects of Plasma-Induced Si Recess Structure on n-MOSFET Performance Degradation , 2009, IEEE Electron Device Letters.

[61]  Donggun Park,et al.  Plasma Charging Damage On Ultra-thin Gate Oxides , 1997, 2nd International Symposium on Plasma Process-Induced Damage.

[62]  Effect of plasma density and uniformity, electron temperature, process gas, and chamber on electron shading damage , 1999, 1999 4th International Symposium on Plasma Process-Induced Damage (IEEE Cat. No.99TH8395).

[63]  B. Riccò,et al.  High-field-induced degradation in ultra-thin SiO/sub 2/ films , 1988 .

[64]  M.J.M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .