Fundamental limits of jitter insensitivity in discrete and continuous-time sigma delta modulators

This paper examines the influence of different clock jitter forms on the performance of discrete-time and continuous-time sigma-delta modulators, the latter with rectangular and with decaying feedback pulse form. It could be shown that the so called accumulative clock jitter from a VCO is the fundamental, performance limiting factor for all architectures, which can not be circumvented, limiting the maximum achievable signal-noise ratio.