Energy-Efficient Single Flux Quantum Technology

Figures of merit connecting processing capabilities with power dissipated (OpS/Watt, Joule/bit, etc.) are becoming dominant factors in choosing technologies for implementing the next generation of computing and communication network systems. Superconductivity is viewed as a technology capable of achieving higher energy efficiencies than other technologies. Static power dissipation of standard RSFQ logic, associated with dc bias resistors, is responsible for most of the circuit power dissipation. In this paper, we review and compare different superconductor digital technology approaches and logic families addressing this problem. We present a novel energy-efficient single flux quantum logic family, ERSFQ/eSFQ. We also discuss energy-efficient approaches for output data interface and overall cryosystem design.

[1]  Hai Wei,et al.  Monolithic three-dimensional integrated circuits using carbon nanotube FETs and interconnects , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

[2]  James A. Hutchby,et al.  Limits to binary logic switch scaling - a gedanken model , 2003, Proc. IEEE.

[3]  I. Parametric Quantron DYNAMICS OF SOME SINGLE FLUX QUANTUM DEVICES , 1977 .

[4]  Wolfgang Porod,et al.  Clocking structures and power analysis for nanomagnet-based logic devices , 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).

[5]  Yuki Yamanashi,et al.  Bit-Serial Single Flux Quantum Microprocessor CORE , 2008, IEICE Trans. Electron..

[6]  G. I. Meijer,et al.  Cooling Energy-Hungry Data Centers , 2010, Science.

[7]  A. Rylyakov New design of single-bit all-digital RSFQ autocorrelator , 1997, IEEE Transactions on Applied Superconductivity.

[8]  Q. Herr,et al.  Integrated Power Divider for Superconducting Digital Circuits , 2011, IEEE Transactions on Applied Superconductivity.

[9]  V.K. Semenov,et al.  Serially Biased Components for Digital-RF Receiver , 2009, IEEE Transactions on Applied Superconductivity.

[10]  Dmitri V. Averin,et al.  Rapid ballistic readout for flux qubits , 2006 .

[11]  Dmitri V. Averin,et al.  Negative-inductance SQUID as the basic element of reversible Josephson-junction circuits , 2003 .

[12]  V. Semenov,et al.  RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems , 1991, IEEE Transactions on Applied Superconductivity.

[13]  Jie Ren,et al.  Progress With Physically and Logically Reversible Superconducting Digital Circuits , 2011, IEEE Transactions on Applied Superconductivity.

[14]  Eiichi Goto,et al.  Quantum Flux Parametron - A Single Quantum Flux Superconducting Logic Device , 1991, Studies in Josephson Supercomputers.

[15]  D.Y. Zinoviev,et al.  New RSFQ circuits (Josephson junction digital devices) , 1993, IEEE Transactions on Applied Superconductivity.

[16]  Saibal Mukhopadhyay,et al.  Switching Energy in CMOS Logic: How far are we from physical limit? , 2006 .

[17]  Sergey V. Rylov,et al.  RSFQ logic arithmetic , 1989 .

[18]  N Yoshikawa,et al.  Design Approach of Dynamically Reconfigurable Single Flux Quantum Logic Gates , 2011, IEEE Transactions on Applied Superconductivity.

[19]  S. Rylov,et al.  Superconducting Switching Amplifiers for High Speed Digital Data Links , 2009, IEEE Transactions on Applied Superconductivity.

[20]  Nobuyuki Yoshikawa,et al.  Reduction of power consumption of RSFQ circuits by inductance-load biasing , 1999 .

[21]  Q. P. Herr,et al.  A new concept for ultra-low power and ultra-high clock rate circuits , 2001 .

[22]  Tetsuya Asai,et al.  Single-flux-quantum circuits for spiking neuron devices , 2006 .

[23]  R. Pease,et al.  Superconductors as very high-speed system-level interconnects , 1987, IEEE Electron Device Letters.

[24]  K. Likharev,et al.  Pulse jitter and timing errors in RSFQ circuits , 1999, IEEE Transactions on Applied Superconductivity.

[25]  R.J. Webber,et al.  Ultra-Low Heat Leak YBCO Superconducting Leads for Cryoelectronic Applications , 2009, IEEE Transactions on Applied Superconductivity.

[26]  O. Mukhanov,et al.  RSFQ 1024-bit shift register for acquisition memory , 1993, IEEE Transactions on Applied Superconductivity.

[27]  Sergey V. Rylov,et al.  Reversible conveyer computation in array of parametric quantrons , 1985 .

[28]  K. Choquette,et al.  Polarization modulation of cruciform vertical-cavity laser diodes , 1994 .

[29]  Vladimir Dotsenko,et al.  Invited Paper Special Section on Recent Progress in Superconductive Digital Electronics Superconductor Digital-rf Receiver Systems , 2022 .

[30]  Richard L. Kautz,et al.  Picosecond pulses on superconducting striplines , 1978 .

[31]  S. Polonsky,et al.  Delay insensitive RSFQ circuits with zero static power dissipation , 1999, IEEE Transactions on Applied Superconductivity.

[32]  Oleg A. Mukhanov,et al.  Superconductor analog-to-digital converters , 2004, Proceedings of the IEEE.

[33]  D. Durand,et al.  Operation of SAIL HTS digital circuits near 1 GHz , 1995, IEEE Transactions on Applied Superconductivity.

[34]  Y. Yamanashi,et al.  Study of LR-Loading Technique for Low-Power Single Flux Quantum Circuits , 2007, IEEE Transactions on Applied Superconductivity.

[35]  Alexander V. Rylyakov,et al.  Superconductor digital frequency divider operating up to 750 GHz , 1998 .

[36]  Stephen Ruth,et al.  Green IT More Than a Three Percent Solution? , 2009, IEEE Internet Computing.

[37]  S. Sarwana,et al.  Zero Static Power Dissipation Biasing of RSFQ Circuits , 2011, IEEE Transactions on Applied Superconductivity.

[38]  O. Mukhanov,et al.  Ultimate performance of the RSFQ logic circuits , 1987 .

[39]  Charles H. Bennett,et al.  Logical reversibility of computation , 1973 .

[40]  N. Miyamoto,et al.  Quantum flux parametron , 1987, 1987 International Electron Devices Meeting.

[41]  D. Gupta,et al.  Current Leads and Optimized Thermal Packaging for Superconducting Systems on Multistage Cryocoolers , 2007, IEEE Transactions on Applied Superconductivity.

[42]  K. Likharev,et al.  Dynamics of some single flux quantum devices: I. Parametric quantron , 1977 .

[43]  Yuki Yamanashi,et al.  100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm2 Nb Multi-Layer Process , 2010, IEICE Trans. Electron..

[44]  N. Vallepalli,et al.  SRAM design on 65-nm CMOS technology with dynamic sleep transistor for leakage reduction , 2005, IEEE Journal of Solid-State Circuits.

[45]  Konstantin K. Likharev,et al.  Resistive Single Flux Quantum Logic for the Josephson- Junction Digital Technology , 2011 .

[46]  A. Sahu,et al.  Progress in Design of Improved High Dynamic Range Analog-to-Digital Converters , 2009, IEEE Transactions on Applied Superconductivity.