Intra- and inter-circuit network for Petri nets based components
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[1] Kees Goossens,et al. AEthereal network on chip: concepts, architectures, and implementations , 2005, IEEE Design & Test of Computers.
[2] Alain Greiner,et al. A generic architecture for on-chip packet-switched interconnections , 2000, DATE '00.
[3] Laure Petrucci,et al. The Petri Net Markup Language: Concepts, Technology, and Tools , 2003, ICATPN.
[4] Axel Jantsch,et al. The Nostrum backbone-a communication protocol stack for Networks on Chip , 2004, 17th International Conference on VLSI Design. Proceedings..
[5] Luis Gomes,et al. Structuring Mechanisms in Petri Net Models , 2005 .
[6] L. Gomes,et al. The Input-Output Place-Transition Petri Net Class and Associated Tools , 2007, 2007 5th IEEE International Conference on Industrial Informatics.
[7] Dake Liu,et al. SoCBUS: switched network on chip for hard real time embedded systems , 2003, Proceedings International Parallel and Distributed Processing Symposium.
[8] Xin Wang,et al. An On-Chip CDMA Communication Network , 2005, 2005 International Symposium on System-on-Chip.
[9] Lus Gomes,et al. Behavioral Modeling for Embedded Systems and Technologies: Applications for Design and Implementation , 2009 .
[10] J. Nurmi,et al. Reusable XGFT interconnect IP for network-on-chip implementations , 2004, 2004 International Symposium on System-on-Chip, 2004. Proceedings..
[11] Jari Nurmi,et al. Issues in the development of a practical NoC: the Proteo concept , 2004, Integr..
[12] L. Benini,et al. Xpipes: a network-on-chip architecture for gigascale systems-on-chip , 2004, IEEE Circuits and Systems Magazine.
[13] Luis Gomes,et al. Petri net partitioning using net splitting operation , 2009, 2009 7th IEEE International Conference on Industrial Informatics.
[14] J. Nurmi. Network-on-Chip: A New Paradigm for System-on-Chip Design , 2005, 2005 International Symposium on System-on-Chip.