High-temperature operation of oxide SFQ-circuit-elements

Single flux quantum (SFQ) circuit components such as an SFQ-dc converter and a confluence buffer have been fabricated by using an YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// ramp-edge junction technology and their logic operations at temperatures up to near 60 K were investigated. The SFQ-dc converter was correctly operated in a wide temperature range from 4.2 K to 56 K and found to be useful for detecting output signals from other SFQ circuit components at any operating temperatures. The basic function that a signal from either of two input Josephson transmission lines (JTLs) was transmitted to an output JTL was confirmed for the confluence buffer and finite operating margins were obtained at temperatures from 42 K to 61 K. The narrowest margin of dc supply current obtained at temperatures from 55 K to 60 K was /spl plusmn/20% and was consistent with the simulation. Margin reduction due to thermal noise was also evaluated. According to the analytical calculation, the operating margin to keep the bit-error rate less than 10/sup -5/ was as large as /spl plusmn/20% even at 50 K when the value of junction critical-current I/sub c/ was kept near 0.4 mA.

[1]  Z. Ivanov,et al.  Voltage divider based on submicron slits in a high Tc superconducting film and two bicrystal grain boundaries , 1995 .

[2]  K. Tanabe,et al.  New type of SFQ-dc converter for use in oxide circuits , 2004 .

[3]  Q.P. Herr,et al.  Temperature-dependent bit-error rate of a clocked superconducting digital circuit , 1999, IEEE Transactions on Applied Superconductivity.

[4]  Yoshinobu Tarutani,et al.  Voltage divider operation using high-Tc superconducting interface-engineered Josephson junctions , 2000 .

[5]  Masahiro Horibe,et al.  Ramp-edge junctions with interface-modified barriers fabricated on YBCO thick films , 2003 .

[6]  K. Tanabe,et al.  Optimization of fabrication conditions for multilayer structures with La-doped YBCO groundplane , 2003 .

[7]  Fabrication of RS flip-flops using Y-Ba-Cu-O ramp-edge junctions and their operation , 2001 .

[8]  Julian Satchell Limitations on HTS single flux quantum logic , 1999, IEEE Transactions on Applied Superconductivity.

[9]  V. Semenov,et al.  RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems , 1991, IEEE Transactions on Applied Superconductivity.

[10]  Hironori Wakana,et al.  Development of Thin Film Multilayer Structures with Smooth Surfaces for HTS SFQ Circuits(Digital Applications, Superconducting Electronic Devices and Their Applications) , 2005 .

[11]  Y. Ishimaru,et al.  Fabrication and logic operation of oxide SFQ-circuit-components , 2005, IEEE Transactions on Applied Superconductivity.

[12]  K. Tanabe,et al.  Observation of Barrier Recrystallization Process and Properties of Ramp-Edge Josephson Junctions with Interface-Modified Barrier , 2002 .

[13]  Keiichi Tanabe,et al.  Development of Thin Film Multilayer Structures with Smooth Surfaces for HTS SFQ Circuits , 2005, IEICE Trans. Electron..