Channel Characterization for Chip-scale Wireless Communications within Computing Packages

Wireless Network-on-Chip (WNoC) appears as a promising alternative to conventional interconnect fabrics for chip-scale communications. WNoC takes advantage of an overlaid network composed by a set of millimeter-wave antennas to reduce latency and increase throughput in the communication between cores. Similarly, wireless inter-chip communication has been also proposed to improve the information transfer between processors, memory, and accelerators in multi-chip settings. However, the wireless channel remains largely unknown in both scenarios, especially in the presence of realistic chip packages. This work addresses the issue by accurately modeling flip-chip packages and investigating the propagation both its interior and its surroundings. Through parametric studies, package configurations that minimize path loss are obtained and the trade-offs observed when applying such optimizations are discussed. Single-chip and multi-chip architectures are compared in terms of the path loss exponent, confirming that the amount of bulk silicon found in the pathway between transmitter and receiver is the main determinant of losses.

[1]  Yue Ping Zhang,et al.  Propagation Mechanisms of Radio Waves Over Intra-Chip Channels With Integrated Antennas: Frequency-Domain Measurements and Time-Domain Analysis , 2007, IEEE Transactions on Antennas and Propagation.

[2]  Eduard Alarcón,et al.  Modeling the EM Field Distribution within a Computer Chip Package , 2018, ArXiv.

[3]  Baris Taskin,et al.  Innovative propagation mechanism for inter-chip and intra-chip communication , 2015, 2015 IEEE 16th Annual Wireless and Microwave Technology Conference (WAMICON).

[4]  Sundeep Prabhakar Chepuri,et al.  Channel Measurements and Modeling for a 60 GHz Wireless Link Within a Metal Cabinet , 2015, IEEE Transactions on Wireless Communications.

[5]  Gerhard Fettweis,et al.  Wireless interconnect for board and chip level , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[6]  David W. Matolak,et al.  Channel modeling for wireless networks-on-chips , 2013, IEEE Communications Magazine.

[7]  Dowon Kim,et al.  A 6-Gb/s Wireless Inter-Chip Data Link Using 43-GHz Transceivers and Bond-Wire Antennas , 2009, IEEE Journal of Solid-State Circuits.

[8]  Yu Su,et al.  Communication Using Antennas Fabricated in Silicon Integrated Circuits , 2007, IEEE Journal of Solid-State Circuits.

[9]  M. Sun,et al.  On-chip antennas for 60-GHz radios in silicon technology , 2005, IEEE Transactions on Electron Devices.

[10]  Chong Han,et al.  Channel modeling and analysis for wireless networks-on-chip communications in the millimeter wave and terahertz bands , 2018, IEEE INFOCOM 2018 - IEEE Conference on Computer Communications Workshops (INFOCOM WKSHPS).

[11]  Radu Marculescu,et al.  On-Chip Communication Network for Efficient Training of Deep Convolutional Networks on Heterogeneous Manycore Systems , 2017, IEEE Transactions on Computers.

[12]  A. Sugavanam,et al.  Wireless communication in a flip-chip package using integrated antennas on silicon substrates , 2005, IEEE Electron Device Letters.

[13]  Partha Pratim Pande,et al.  Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges , 2012, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

[14]  Amlan Ganguly,et al.  Feasibility study of transmission between wireless interconnects in multichip multicore systems , 2017, 2017 IEEE International Symposium on Antennas and Propagation & USNC/URSI National Radio Science Meeting.

[15]  Lei Guo,et al.  Short-Range, Wireless Interconnect within a Computing Chassis: Design Challenges , 2010, IEEE Design & Test of Computers.

[16]  David W. Matolak,et al.  Exploring Wireless Technology for Off-Chip Memory Access , 2016, 2016 IEEE 24th Annual Symposium on High-Performance Interconnects (HOTI).

[17]  Theodore S. Rappaport,et al.  On-Chip Integrated Antenna Structures in CMOS for 60 GHz WPAN Systems , 2009, GLOBECOM 2009 - 2009 IEEE Global Telecommunications Conference.

[18]  Sujay Deb,et al.  HyWin: Hybrid Wireless NoC with Sandboxed Sub-Networks for CPU/GPU Architectures , 2017, IEEE Transactions on Computers.

[19]  Michael Pecht,et al.  Encapsulation Technologies for Electronic Applications , 2019 .

[20]  Josep Torrellas,et al.  Millimeter-Wave Propagation within a Computer Chip Package , 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

[21]  Zhi Ming Chen,et al.  Inter-Chip Wireless Communication Channel: Measurement, Characterization, and Modeling , 2007, IEEE Transactions on Antennas and Propagation.

[22]  Avinash Karanth Kodi,et al.  Antennas and Channel Characteristics for Wireless Networks on Chips , 2017, Wireless Personal Communications.

[23]  Christina Lopper,et al.  Carrierless design for handling and processing of ultrathin wafers , 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

[24]  Ajaykumar Kannan,et al.  Exploiting Interposer Technologies to Disintegrate and Reintegrate Multicore Processors , 2016, IEEE Micro.

[25]  Arvind Kumar,et al.  Three-dimensional integrated circuits , 2006, IBM J. Res. Dev..

[26]  Avinash Karanth Kodi,et al.  Monopoles Loaded With 3-D-Printed Dielectrics for Future Wireless Intrachip Communications , 2017, IEEE Transactions on Antennas and Propagation.

[27]  T. Kikkawa,et al.  High-gain on-chip antennas for LSI intra-/inter-chip wireless interconnection , 2009, 2009 3rd European Conference on Antennas and Propagation.

[28]  P. Andry,et al.  Characterization of micro-bump C4 interconnects for Si-carrier SOP applications , 2006, 56th Electronic Components and Technology Conference 2006.

[29]  Natalie D. Enright Jerger,et al.  Modular Routing Design for Chiplet-Based Systems , 2018, 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA).

[30]  Cyril Luxey,et al.  Switched-Beam 60-GHz Four-Element Array for Multichip Multicore System , 2018, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[31]  Vincenzo Catania,et al.  An Efficient Radio Access Control Mechanism for Wireless Network-On-Chip Architectures , 2015 .

[32]  Amlan Ganguly,et al.  On-Chip Antennas for Inter-Chip Wireless Interconnections: Challenges and Opportunities , 2018 .

[33]  Carole-Jean Wu,et al.  MCM-GPU: Multi-chip-module GPUs for continued performance scalability , 2017, 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA).

[34]  Kiyoung Choi,et al.  Exploiting New Interconnect Technologies in On-Chip Communication , 2012, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

[35]  Amlan Ganguly,et al.  A Wireless Interconnection Framework for Seamless Inter and Intra-Chip Communication in Multichip Systems , 2017, IEEE Transactions on Computers.

[36]  Kihong Kim,et al.  A plane wave model approach to understanding propagation in an intra-chip communication system , 2001, IEEE Antennas and Propagation Society International Symposium. 2001 Digest. Held in conjunction with: USNC/URSI National Radio Science Meeting (Cat. No.01CH37229).

[37]  Josep Torrellas,et al.  Medium Access Control in Wireless Network-on-Chip: A Context Analysis , 2018, IEEE Communications Magazine.

[38]  Puneet Gupta,et al.  A Case for Packageless Processors , 2018, 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA).

[39]  Jau-Jr Lin,et al.  Inter-chip wireless communication , 2013, 2013 7th European Conference on Antennas and Propagation (EuCAP).

[40]  K. Melde,et al.  The Design of Broadband 60 GHz AMC Antenna in Multi-Chip RF Data Transmission , 2013, IEEE Transactions on Antennas and Propagation.

[41]  Ronny Henker,et al.  Survey of Photonic and Plasmonic Interconnect Technologies for Intra-Datacenter and High-Performance Computing Communications , 2018, IEEE Communications Surveys & Tutorials.

[42]  Josep Torrellas,et al.  WiSync: An Architecture for Fast Synchronization through On-Chip Wireless Communication , 2016, ASPLOS.

[43]  K. Melde,et al.  Chip-to-Chip Switched Beam 60 GHz Circular Patch Planar Antenna Array and Pattern Considerations , 2018, IEEE Transactions on Antennas and Propagation.

[44]  Sujay Deb,et al.  OFDM Based High Data Rate, Fading Resilient Transceiver for Wireless Networks-on-Chip , 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

[45]  Alenka Zajic,et al.  Characterization of 300-GHz Wireless Channel on a Computer Motherboard , 2016, IEEE Transactions on Antennas and Propagation.

[46]  Xiaowu Zhang,et al.  Heterogeneous 2.5D integration on through silicon interposer , 2015 .

[47]  G. Hanson,et al.  Wave Propagation Mechanisms for Intra-Chip Communications , 2009, IEEE Transactions on Antennas and Propagation.

[48]  Hao Yu,et al.  An Energy-efficient Adaptive Sub-THz Wireless Interconnect with MIMO-Beamforming between Cores and DRAMs , 2016, NANOCOM.

[49]  M. Ueba,et al.  Experimental Characterization of Microwave Radio Propagation in ICT Equipment for Wireless Harness Communications , 2011, IEEE Transactions on Antennas and Propagation.

[50]  David W. Matolak,et al.  A-WiNoC: Adaptive Wireless Network-on-Chip Architecture for Chip Multiprocessors , 2015, IEEE Transactions on Parallel and Distributed Systems.

[51]  Vladimir Poulkov,et al.  On-Chip Monolithic Integrated Antennas Using CMOS Ground Supply Planes , 2016, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[52]  Josep Torrellas,et al.  OrthoNoC: A Broadcast-Oriented Dual-Plane Wireless Network-on-Chip Architecture , 2018, IEEE Transactions on Parallel and Distributed Systems.

[53]  Eduard Alarcón,et al.  Intercell Wireless Communication in Software-defined Metasurfaces , 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).