Heterogenic Multi-Core System on Chip for Virtual Based Security

The paper describes the process of coding information in the heterogenic multi-core system on chip for virtual-based security designed For image processing, signal processing and neural networks emulation. The coding of information carried out in assembly language according to the GOST. This is an implementation of the GOST – a standard symmetric key block cipher has a 64-bit block size and 256-bit key size.

[1]  Kaisa Nyberg,et al.  Generalized Feistel Networks , 1996, ASIACRYPT.

[2]  H. Feistel Cryptography and Computer Privacy , 1973 .

[3]  T. Jamil The Rijndael algorithm , 2004, IEEE Potentials.