Viterbi decoder with test function

PURPOSE: A Viterbi decoder is provided to be capable of controlling a Viterbi decoder by the blocks and performing a test for a selected block. CONSTITUTION: A Viterbi decoder(100) includes a controller(110) for outputting a Viterbi control signal(CTL) depending on a frame synchronization signal(F_SYNC). An input buffer(120) selects/controls the first test control data(d1) from the Viterbi control signal(CTL) or a data bus(IN_DATA) depending on the first pin control data(p1) from a pin controller(PIN). A symbol matrix table(130) selects/controls the second test control data(d2) from the Viterbi control signal(CTL) or the data bus(IN_DATA) depending on the second pin control data(p2) from the pin controller(PIN). A branch matrix(140) selects/controls the third test control data(d3) from the Viterbi control signal(CTL) or the data bus(IN_DATA) depending on the third pin control data(p3) from the pin controller(PIN). An add/compare selector(150) selects/controls the fourth test control data(d4) from the Viterbi control signal(CTL) or the data bus(IN_DATA) depending on the fourth pin control data(p4) from the pin controller(PIN). A trace back(160) selects/controls the fifth test control data(d5) from the Viterbi control signal(CTL) or the data bus(IN_DATA) depending on the fifth pin control data(p5) from the pin controller(PIN). An output buffer(160) selects/controls the sixth test control data(d6) from the Viterbi control signal(CTL) or the data bus(IN_DATA) depending on the sixth pin control data(p6) from the pin controller(PIN).