Low-Frequency Noise and Random Telegraph Noise on Near-Ballistic III-V MOSFETs

In this paper, we report the observation of random telegraph noise (RTN) in highly scaled InGaAs gate-all-around (GAA) MOSFETs fabricated by a top-down approach. RTN and low-frequency noise were systematically studied for devices with various gate dielectrics, channel lengths, and nanowire diameters. Mobility fluctuation is identified to be the source of 1/f noise. The 1/f noise was found to decrease as the channel length scaled down from 80 to 20 nm comparing with classical theory, indicating the near-ballistic transport in highly scaled InGaAs GAA MOSFET. Low-frequency noise in ballistic transistors is discussed theoretically.

[1]  G. Bersuker,et al.  Positive Bias Instability and Recovery in InGaAs Channel nMOSFETs , 2013, IEEE Transactions on Device and Materials Reliability.

[2]  M. Nelhiebel,et al.  The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction–Diffusion to Switching Oxide Traps , 2011, IEEE Transactions on Electron Devices.

[3]  L.K.J. Vandamme,et al.  What Do We Certainly Know About $\hbox{1}/f$ Noise in MOSTs? , 2008, IEEE Transactions on Electron Devices.

[4]  M. J. W. Rodwell,et al.  Record extrinsic transconductance (2.45 mS/µm at VDS = 0.5 V) InAs/In0.53Ga0.47As channel MOSFETs using MOCVD source-drain regrowth , 2013, 2013 Symposium on VLSI Technology.

[5]  K. Kakushima,et al.  Fundamental origin of excellent low-noise property in 3D Si-MOSFETs ∼ Impact of charge-centroid in the channel due to quantum effect on 1/f noise ∼ , 2011, 2011 International Electron Devices Meeting.

[6]  J.P. Campbell,et al.  Random telegraph noise in highly scaled nMOSFETs , 2009, 2009 IEEE International Reliability Physics Symposium.

[7]  M. Alam,et al.  Low-frequency noise and RTN on near-ballistic III–V GAA nanowire MOSFETs , 2014, 2014 IEEE International Electron Devices Meeting.

[8]  Phaedon Avouris,et al.  Low-frequency current fluctuations in individual semiconducting single-wall carbon nanotubes. , 2006, Nano letters.

[9]  Weihai Bu,et al.  New observations on complex RTN in scaled high-κ/metal-gate MOSFETs — The role of defect coupling under DC/AC condition , 2013, 2013 IEEE International Electron Devices Meeting.

[10]  M. Kobayashi,et al.  Statistical measurement of random telegraph noise and its impact in scaled-down high-κ/metal-gate MOSFETs , 2012, 2012 International Electron Devices Meeting.

[11]  M. A. Wahab,et al.  Impact of nanowire variability on performance and reliability of gate-all-around III-V MOSFETs , 2013, 2013 IEEE International Electron Devices Meeting.

[12]  B. Kaczer,et al.  Suitability of high-k gate oxides for III–V devices: A PBTI study in In0.53Ga0.47As devices with Al2O3 , 2014, 2014 IEEE International Reliability Physics Symposium.

[13]  A. Hoffmann,et al.  Overview of the impact of downscaling technology on 1/f noise in p-MOSFETs to 90 nm , 2004 .

[14]  Niamh Waldron,et al.  InGaAs Gate-All-Around Nanowire Devices on 300mm Si Substrates , 2014, IEEE Electron Device Letters.

[15]  M. A. Wahab,et al.  Origin and implications of hot carrier degradation of Gate-all-around nanowire III–V MOSFETs , 2014, 2014 IEEE International Reliability Physics Symposium.

[16]  J. Baugh,et al.  Trapped charge dynamics in InAs nanowires , 2012, 1209.3237.

[17]  M. Alam,et al.  Direct observation of self-heating in III–V gate-all-around nanowire MOSFETs , 2014, 2014 IEEE International Electron Devices Meeting.

[18]  李丹妮,et al.  In 0.53 Ga 0.47 As 光电探测器量子效率的理论仿真分析 , 2015 .

[19]  Peide D. Ye,et al.  Size-Dependent-Transport Study of $\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}$ Gate-All-Around Nanowire MOSFETs: Impact of Quantum Confinement and Volume Inversion , 2012, IEEE Electron Device Letters.

[20]  D. Frank,et al.  Increasing threshold voltage variation due to random telegraph noise in FETs as gate lengths scale to 20 nm , 2006, 2009 Symposium on VLSI Technology.

[21]  G. Dewey,et al.  Electrostatics improvement in 3-D tri-gate over ultra-thin body planar InGaAs quantum well field effect transistors with high-K gate dielectric and scaled gate-to-drain/gate-to-source separation , 2011, 2011 International Electron Devices Meeting.

[22]  F. Hooge 1/ƒ noise is no surface effect , 1969 .

[23]  K. Takeuchi,et al.  Statistical characterization of trap position, energy, amplitude and time constants by RTN measurement of multiple individual traps , 2010, 2010 International Electron Devices Meeting.

[24]  J. Salfi,et al.  Direct observation of single-charge-detection capability of nanowire field-effect transistors. , 2010, Nature nanotechnology.

[25]  David B. Janes,et al.  Current and Noise Properties of InAs Nanowire Transistors With Asymmetric Contacts Induced by Gate Overlap , 2014, IEEE Transactions on Electron Devices.

[26]  Gérard Ghibaudo,et al.  Electrical noise and RTS fluctuations in advanced CMOS devices , 2002, Microelectron. Reliab..

[27]  E. Leobandung,et al.  Self-aligned III-V MOSFETs: Towards a CMOS compatible and manufacturable technology solution , 2013, 2013 IEEE International Electron Devices Meeting.

[28]  G. Ghibaudo,et al.  Low-Frequency Noise Investigation and Noise Variability Analysis in High- $k$/Metal Gate 32-nm CMOS Transistors , 2011, IEEE Transactions on Electron Devices.

[29]  Mengwei Si,et al.  Effects of forming gas anneal on ultrathin InGaAs nanowire metal-oxide-semiconductor field-effect transistors , 2013 .

[30]  S. Deora,et al.  VLSI processed InGaAs on Si MOSFETs with thermally stable, self-aligned Ni-InGaAs contacts achieving: Enhanced drive current and pathway towards a unified contact module , 2013, 2013 IEEE International Electron Devices Meeting.

[31]  J. Chen,et al.  Experimental study of channel doping concentration impacts on random telegraph signal noise and successful noise suppression by strain induced mobility enhancement , 2013, 2013 Symposium on VLSI Technology.

[32]  F. Beltram,et al.  Probing the gate--voltage-dependent surface potential of individual InAs nanowires using random telegraph signals. , 2011, ACS nano.

[33]  Yong-Zhong Xiong,et al.  Investigation of Low-Frequency Noise in Silicon Nanowire MOSFETs in the Subthreshold Region , 2009, IEEE Electron Device Letters.

[34]  Mikael Östling,et al.  Low-Frequency Noise in Advanced MOS Devices , 2007 .

[35]  Dimitri A. Antoniadis,et al.  Novel intrinsic and extrinsic engineering for high-performance high-density self-aligned InGaAs MOSFETs: Precise channel thickness control and sub-40-nm metal contacts , 2014, 2014 IEEE International Electron Devices Meeting.

[36]  J. D. del Alamo Nanometre-scale electronics with III-V compound semiconductors. , 2011, Nature.

[37]  M. A. Pourghaderi,et al.  RTN and PBTI-induced time-dependent variability of replacement metal-gate high-k InGaAs FinFETs , 2014, 2014 IEEE International Electron Devices Meeting.

[38]  Peide D. Ye,et al.  Size-Dependent-Transport Study of In 0 . 53 Ga 0 . 47 As Gate-All-Around Nanowire MOSFETs : Impact of Quantum Confinement and Volume Inversion , 2012 .

[39]  K. Yeo,et al.  Effect of technology scaling on the 1/f noise of deep submicron PMOS transistors , 2004 .

[40]  S. Chang,et al.  Low-Frequency Noise Characteristics for Various -Added -Based 28-nm High- /Metal-Gate nMOSFETs , 2013 .

[41]  J. Tersoff,et al.  Low-frequency noise in nanoscale ballistic transistors. , 2007, Nano letters.