This paper gives a self{contained description of classical IP (internet protocol) and ARP (address resolution protocol) over ATM (asynchronous transfer mode) and describes a model facilitating the implementation of the switched virtual circuit{ based local area network ATM subnet model. Its contents are distilled from the design and implementation of a prototype of a device driver for this particular subnet model. The work was conducted at the Computer Science Laboratory (CSL) at the Xerox Palo Alto Research Center (PARC). We outline the main features of the two technologies, establish their importance as data communication paradigms, motivate their integration, and sketch several scenarios of their interaction. We concentrate on one speci c scenario: the utilization of ATM as a logical IP subnetwork. Building blocks of this approach are the ATM address resolution protocol as a unicast server based emulation of the classical broadcast address resolution protocol, and connection management functionality as provided by the Q.2931 protocol. The manipulation of transmitted network protocol data units between their submission to the network layer and their transmission by ATM are detailed in an appendix. These explanations are structured analogous to the lower layers in the IEEE local area network model. The complexity and intricacy of the logical IP subnetwork (LIS) approach motivate the development of a model describing the interaction of all participants in an LIS. The devised model is based on a nite automaton. It instruments a structured implementation and it assists in convincing the implementor of the completeness and correctness of the implementation by facilitating its gradual testing and extension.
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