Pareto optimization of analog circuits considering variability

Until recently, analog sizing decided a-priori by weight assignment the trade-off between competing design objectives. Nowadays, architectural design requires the knowledge of all possible optimal trade-offs of a building block. Methods for Pareto optimization provide the set of all optimal trade-offs, the so-called Pareto front. The next generation of analog Pareto optimization tools has to additionally consider the manufacturing variations. This paper will describe an approach to this challenging problem. It is based on the computation of the worst-case performance values on discrete sets of Pareto points that cover the Pareto front.

[1]  Amit Patra,et al.  Mixing global and local competition in genetic optimization based design space exploration of analog circuits , 2005, Design, Automation and Test in Europe.

[2]  Rob A. Rutenbar,et al.  Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[3]  Alberto L. Sangiovanni-Vincentelli,et al.  Support vector machines for analog circuit performance representation , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[4]  Guido Stehr,et al.  Analog Performance Space Exploration by Normal-Boundary Intersection and by Fourier–Motzkin Elimination , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[5]  Helmut Graeb,et al.  Analog Design Centering and Sizing , 2007 .

[6]  Ulf Schlichtmann,et al.  Deterministic approaches to analog performance space exploration (PSE) , 2005, Proceedings. 42nd Design Automation Conference, 2005..

[7]  Georges G. E. Gielen,et al.  WATSON: design space boundary exploration and model generation for analog and RFIC design , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[8]  David J. Allstot,et al.  Elitist nondominated sorting genetic algorithm based RF IC optimizer , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[9]  Ulf Schlichtmann,et al.  Trade-Off Design of Analog Circuits using Goal Attainment and "Wave Front" Sequential Quadratic Programming , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.