Analysis of clock jitter and noise of the power supply

There are a method, system and / or a device is disclosed for analyzing an analysis of a clock signal jitter and noise of a power supply. In one embodiment, a method may include receiving a clock signal which may be a first signal, and then include generating a second signal on the basis of the first signal. The method may further include the delay of the second signal corresponding to a basic delay and / or a number of fine delays. The method may further include the measurement of the second delayed signal and to compare those measurements with the theoretical measurements of the second signal, which would occur when the first signal would not contain noise. The method may further include the determination on the basis of the measurements and the comparisons, whether a noise is present, if the noise is a high frequency or a low frequency noise and if the noise occurring due to clock jitter and / or deviations of the power supply