Concurrent Error Detection Using Watchdog Processors in the Multiprocessor System MEMSY
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In this paper a proposal for an architecture of a general purpose watchdog processor is made. This watchdog processor monitors the behavior of the main processor by checking the control flow of processes using the Extended Signature Integrity Checking method (ESIC). The watchdog processor is independent of the architecture of the main processor because it is linked to the main processor by a memory interface.
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