论文信息 - Method to reduce the sign bit extension in a multiplier that uses the modified Booth algorithm

Method to reduce the sign bit extension in a multiplier that uses the modified Booth algorithm

A technique that reduces the number of full adders that are used to implement the modified Booth algorithm is described. This technique is based on the need to extend the sign bit of the partial products and on the redundancy that is implicit in this operation.

M. Roorda

[1] Louis P. Rubinfield. A Proof of the Modified Booth's Algorithm for Multiplication , 1975, IEEE Transactions on Computers.

[2] Shlomo Waser,et al. High-Speed Monolithic Multipliers for Real-Time Digital Signal Processing , 1978, Computer.